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reformatted

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This commit is contained in:
Markus Fröschle
2014-12-26 22:14:57 +00:00
parent 851e2a455f
commit 09b8c3acb7
5 changed files with 58 additions and 140 deletions
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101
BaS_gcc/BaS_gcc.files
View File

@@ -4,20 +4,6 @@ dma/MCD_tasks.c
dma/MCD_tasksInit.c
exe/basflash.c
exe/basflash_start.c
firebee/bas.elf
firebee/bas.lk
firebee/bas.map
firebee/bas.s19
firebee/basflash.elf
firebee/basflash.map
firebee/basflash.s19
firebee/bashflash.lk
firebee/depend
firebee/libbas.a
firebee/ram.elf
firebee/ram.lk
firebee/ram.map
firebee/ram.s19
flash/flash.c
flash/s19reader.c
fs/cc932.c
@@ -53,6 +39,7 @@ include/fecbd.h
include/ff.h
include/ffconf.h
include/firebee.h
include/font.h
include/i2c-algo-bit.h
include/i2c.h
include/icmp.h
@@ -111,6 +98,7 @@ include/tftp.h
include/udp.h
include/usb.h
include/usb_defs.h
include/usb_hub.h
include/user_io.h
include/util.h
include/version.h
@@ -130,34 +118,6 @@ include/x86prim_ops.h
include/x86regs.h
include/xhdi_sd.h
kbd/ikbd.c
m54455/bas.elf
m54455/bas.lk
m54455/bas.map
m54455/bas.s19
m54455/basflash.elf
m54455/basflash.map
m54455/basflash.s19
m54455/bashflash.lk
m54455/depend
m54455/libbas.a
m54455/ram.elf
m54455/ram.lk
m54455/ram.map
m54455/ram.s19
m5484lite/bas.elf
m5484lite/bas.lk
m5484lite/bas.map
m5484lite/bas.s19
m5484lite/basflash.elf
m5484lite/basflash.map
m5484lite/basflash.s19
m5484lite/bashflash.lk
m5484lite/depend
m5484lite/libbas.a
m5484lite/ram.elf
m5484lite/ram.lk
m5484lite/ram.map
m5484lite/ram.s19
net/am79c874.c
net/arp.c
net/bcm5222.c
@@ -171,7 +131,6 @@ net/nif.c
net/queue.c
net/tftp.c
net/udp.c
nutil/s19header
nutil/s19header.c
pci/ehci-hcd.c
pci/ohci-hcd.c
@@ -186,56 +145,16 @@ spi/sd_card.c
sys/BaS.c
sys/cache.c
sys/driver_mem.c
sys/exceptions.S
sys/fault_vectors.c
sys/init_fpga.c
sys/interrupts.c
sys/mmu.c
sys/startcf.S
sys/sysinit.c
usb/usb.c
usb/usb_mouse.c
util/bas_printf.c
util/bas_string.c
util/printf_helper.S
util/wait.c
video/fbmem.c
video/fbmodedb.c
video/fbmon.c
video/fnt_st_8x16.c
video/offscreen.c
video/vdi_fill.c
video/videl.c
video/video.c
x86emu/x86biosemu.c
x86emu/x86debug.c
x86emu/x86decode.c
x86emu/x86fpu.c
x86emu/x86ops.c
x86emu/x86ops2.c
x86emu/x86pcibios.c
x86emu/x86prim_ops.c
x86emu/x86sys.c
xhdi/xhdi_interface.c
xhdi/xhdi_sd.c
xhdi/xhdi_vec.S
bas.lk.in
bas_firebee.bdm
bas_m5484.bdm
basflash.lk.in
check.bdm
COPYING
COPYING.LESSER
dump.bdm
mcf5474.gdb
Makefile
tos/jtagwait/Makefile
tos/jtagwait/sources/jtagwait.c
tos/jtagwait/include/driver_vec.h
tos/bascook/Makefile
tos/mcdcook/sources/bascook.c
tos/bascook/sources/bascook.c
tos/jtagwait/include/bas_printf.h
tos/jtagwait/include/bas_string.h
tos/jtagwait/include/driver_vec.h
tos/jtagwait/include/MCF5475.h
tos/jtagwait/include/MCF5475_CLOCK.h
tos/jtagwait/include/MCF5475_CTM.h
tos/jtagwait/include/MCF5475_DMA.h
@@ -259,15 +178,9 @@ tos/jtagwait/include/MCF5475_SLT.h
tos/jtagwait/include/MCF5475_SRAM.h
tos/jtagwait/include/MCF5475_USB.h
tos/jtagwait/include/MCF5475_XLB.h
tos/jtagwait/include/MCF5475.h
tos/jtagwait/include/driver_vec.h
tos/jtagwait/sources/printf_helper.S
tos/bascook/Makefile
tos/bascook/sources/bascook.c
tos/Makefile
tos/jtagwait/sources/jtagwait.c
usb/usb.c
usb/usb_hub.c
include/usb_hub.h
tos/Makefile
usb/usb_kbd.c
tos/jtagwait/sources/bas_printf.c
tos/jtagwait/sources/bas_string.c

3
BaS_gcc/BaS_gcc.includes
View File

@@ -1,3 +1,2 @@
include
/usr/m68k-elf/include
tos
tos/jtagwait/include

2
BaS_gcc/Makefile
View File

@@ -9,7 +9,7 @@
# can be either "Y" or "N" (without quotes). "Y" for using the m68k-elf-, "N" for using the m68k-atari-mint
# toolchain
COMPILE_ELF=Y
COMPILE_ELF=N
ifeq (Y,$(COMPILE_ELF))
TCPREFIX=m68k-elf-

2
BaS_gcc/sys/init_fpga.c
View File

@@ -51,8 +51,6 @@ extern uint8_t _FPGA_CONFIG_SIZE[];
* init_fpga() will honour this and not overwrite config.
*/
extern bool _FPGA_JTAG_LOADED;
extern long _FPGA_JTAG_VALID;
#define VALID_JTAG 0xaffeaffe
extern int32_t _FPGA_JTAG_VALID;
#define VALID_JTAG 0xaffeaffe

90
BaS_gcc/sys/sysinit.c
View File

@@ -813,7 +813,7 @@ void dvi_on(void)
MCF_I2C_I2DR = 0x7a; /* send data: address of TFP410 */
wait_i2c_transfer_finished();
if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) /* next try if no acknowledge */
if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) /* next try if no acknowledge */
continue;
MCF_I2C_I2DR = 0x00; /* send data: SUB ADRESS 0 */
@@ -823,12 +823,13 @@ void dvi_on(void)
MCF_I2C_I2DR = 0x7b; /* begin read */
wait_i2c_transfer_finished();
if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) /* next try if no acknowledge */
if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) /* next try if no acknowledge */
continue;
#ifdef _NOT_USED_
MCH_I2C_I2CR &= ~MCF_I2C_I2CR_MTX; /* FIXME: not clear where this came from ... */
#endif /* _NOT_USED_ */
MCF_I2C_I2CR &= 0xef; /* ... this actually disables the I2C module... */
dummyByte = MCF_I2C_I2DR; /* dummy read */
@@ -841,17 +842,17 @@ void dvi_on(void)
MCF_I2C_I2CR = MCF_I2C_I2CR_IEN; /* stop */
dummyByte = MCF_I2C_I2DR; // dummy read
dummyByte = MCF_I2C_I2DR; /* dummy read */
if (receivedByte != 0x4c)
continue;
MCF_I2C_I2CR = 0x0; // stop
MCF_I2C_I2SR = 0x0; // clear sr
MCF_I2C_I2CR = 0x0; /* stop */
MCF_I2C_I2SR = 0x0; /* clear sr */
waitfor(10000, i2c_bus_free);
MCF_I2C_I2CR = 0xb0; // on tx master
MCF_I2C_I2CR = 0xb0; /* on tx master */
MCF_I2C_I2DR = 0x7A;
wait_i2c_transfer_finished();
@@ -859,45 +860,45 @@ void dvi_on(void)
if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK)
continue;
MCF_I2C_I2DR = 0x08; // SUB ADRESS 8
MCF_I2C_I2DR = 0x08; /* SUB ADRESS 8 */
wait_i2c_transfer_finished();
MCF_I2C_I2DR = 0xbf; // ctl1: power on, T:M:D:S: enable
MCF_I2C_I2DR = 0xbf; /* ctl1: power on, T:M:D:S: enable */
wait_i2c_transfer_finished();
MCF_I2C_I2CR = 0x80; // stop
dummyByte = MCF_I2C_I2DR; // dummy read
MCF_I2C_I2SR = 0x0; // clear sr
MCF_I2C_I2CR = 0x80; /* stop */
dummyByte = MCF_I2C_I2DR; /* dummy read */
MCF_I2C_I2SR = 0x0; /* clear sr */
waitfor(10000, i2c_bus_free);
MCF_I2C_I2CR = 0xb0;
MCF_I2C_I2DR = 0x7A;
MCF_I2C_I2DR = 0x7a;
wait_i2c_transfer_finished();
if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK)
continue;
MCF_I2C_I2DR = 0x08; // SUB ADRESS 8
MCF_I2C_I2DR = 0x08; /* SUB ADRESS 8 */
wait_i2c_transfer_finished();
MCF_I2C_I2CR |= 0x4; // repeat start
MCF_I2C_I2DR = 0x7b; // beginn read
MCF_I2C_I2CR |= 0x4; /* repeat start */
MCF_I2C_I2DR = 0x7b; /* begin read */
wait_i2c_transfer_finished();
if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK)
continue;
MCF_I2C_I2CR &= 0xef; // switch to rx
dummyByte = MCF_I2C_I2DR; // dummy read
MCF_I2C_I2CR &= 0xef; /* switch to rx */
dummyByte = MCF_I2C_I2DR; /* dummy read */
wait_i2c_transfer_finished();
MCF_I2C_I2CR |= 0x08; // txak=1
MCF_I2C_I2CR |= 0x08; /* txak=1 */
wait(50);
@@ -905,26 +906,29 @@ void dvi_on(void)
wait_i2c_transfer_finished();
MCF_I2C_I2CR = 0x80; // stop
MCF_I2C_I2CR = 0x80; /* stop */
dummyByte = MCF_I2C_I2DR; // dummy read
dummyByte = MCF_I2C_I2DR; /* dummy read */
num_tries++;
} while ((receivedByte != 0xbf) && (num_tries < 10));
if (num_tries >= 10) {
if (num_tries >= 10)
{
xprintf("FAILED!\r\n");
} else {
}
else
{
xprintf("finished\r\n");
}
UNUSED(dummyByte);
// Avoid warning
UNUSED(dummyByte); /* Avoid warning */
}
/*
* AC97
*/
void init_ac97(void) {
void init_ac97(void)
{
// PSC2: AC97 ----------
int i;
int zm;
@@ -934,9 +938,9 @@ void init_ac97(void) {
xprintf("AC97 sound chip initialization: ");
MCF_PAD_PAR_PSC2 = MCF_PAD_PAR_PSC2_PAR_RTS2_RTS // PSC2=TX,RX BCLK,CTS->AC'97
| MCF_PAD_PAR_PSC2_PAR_CTS2_BCLK
| MCF_PAD_PAR_PSC2_PAR_TXD2
| MCF_PAD_PAR_PSC2_PAR_RXD2;
| MCF_PAD_PAR_PSC2_PAR_CTS2_BCLK
| MCF_PAD_PAR_PSC2_PAR_TXD2
| MCF_PAD_PAR_PSC2_PAR_RXD2;
MCF_PSC2_PSCMR1 = 0x0;
MCF_PSC2_PSCMR2 = 0x0;
MCF_PSC2_PSCIMR = 0x0300;
@@ -990,28 +994,32 @@ livo:
MCF_PSC2_PSCTB_AC97 = 0xE0000000; //START SLOT1 + SLOT2, FIRST FRAME
MCF_PSC2_PSCTB_AC97 = 0x16000000; //SLOT1:WR REG AUX VOLUME adr 0x16
MCF_PSC2_PSCTB_AC97 = 0x06060000; //SLOT1:VOLUME
for (i = 3; i < 13; i++) {
MCF_PSC2_PSCTB_AC97 = 0x0; //SLOT2-12:WR REG ALLES 0
for (i = 3; i < 13; i++)
{
MCF_PSC2_PSCTB_AC97 = 0x0; //SLOT2-12:WR REG ALLES 0
}
// line in VOLUME +12dB
MCF_PSC2_PSCTB_AC97 = 0xE0000000; //START SLOT1 + SLOT2, FIRST FRAME
MCF_PSC2_PSCTB_AC97 = 0x10000000; //SLOT1:WR REG MASTER VOLUME adr 0x02
for (i = 2; i < 13; i++) {
MCF_PSC2_PSCTB_AC97 = 0x0; //SLOT2-12:WR REG ALLES 0
for (i = 2; i < 13; i++)
{
MCF_PSC2_PSCTB_AC97 = 0x0; //SLOT2-12:WR REG ALLES 0
}
// cd in VOLUME 0dB
MCF_PSC2_PSCTB_AC97 = 0xE0000000; //START SLOT1 + SLOT2, FIRST FRAME
MCF_PSC2_PSCTB_AC97 = 0x12000000; //SLOT1:WR REG MASTER VOLUME adr 0x02
for (i = 2; i < 13; i++) {
MCF_PSC2_PSCTB_AC97 = 0x0; //SLOT2-12:WR REG ALLES 0
for (i = 2; i < 13; i++)
{
MCF_PSC2_PSCTB_AC97 = 0x0; //SLOT2-12:WR REG ALLES 0
}
// mono out VOLUME 0dB
MCF_PSC2_PSCTB_AC97 = 0xE0000000; //START SLOT1 + SLOT2, FIRST FRAME
MCF_PSC2_PSCTB_AC97 = 0x06000000; //SLOT1:WR REG MASTER VOLUME adr 0x02
MCF_PSC2_PSCTB_AC97 = 0x00000000; //SLOT1:WR REG MASTER VOLUME adr 0x02
for (i = 3; i < 13; i++) {
MCF_PSC2_PSCTB_AC97 = 0x0; //SLOT2-12:WR REG ALLES 0
for (i = 3; i < 13; i++)
{
MCF_PSC2_PSCTB_AC97 = 0x0; //SLOT2-12:WR REG ALLES 0
}
MCF_PSC2_PSCTFCR |= MCF_PSC_PSCTFCR_WFR; //set EOF
MCF_PSC2_PSCTB_AC97 = 0x00000000; //last data
@@ -1024,16 +1032,16 @@ extern uint8_t _STRAM_END[];
#define STRAM_END ((uint32_t)_STRAM_END)
extern uint8_t _FIRETOS[];
#define FIRETOS ((uint32_t)_FIRETOS) /* where FireTOS is stored in flash */
#define FIRETOS ((uint32_t)_FIRETOS) /* where FireTOS is stored in flash */
extern uint8_t _BAS_LMA[];
#define BAS_LMA (&_BAS_LMA[0]) /* where the BaS is stored in flash */
#define BAS_LMA (&_BAS_LMA[0]) /* where the BaS is stored in flash */
extern uint8_t _BAS_IN_RAM[];
#define BAS_IN_RAM (&_BAS_IN_RAM[0]) /* where the BaS is run in RAM */
#define BAS_IN_RAM (&_BAS_IN_RAM[0]) /* where the BaS is run in RAM */
extern uint8_t _BAS_SIZE[];
#define BAS_SIZE ((uint32_t)_BAS_SIZE) /* size of the BaS, in bytes */
#define BAS_SIZE ((uint32_t)_BAS_SIZE) /* size of the BaS, in bytes */
extern uint8_t _FASTRAM_END[];
#define FASTRAM_END ((uint32_t)_FASTRAM_END)
@@ -1063,7 +1071,7 @@ void initialize_hardware(void)
init_gpio();
init_serial();
init_slt();
init_fbcs();
init_fbcs();
init_ddram();
init_fpga();