Fixed FPGA initialization bit ordering.
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@@ -61,10 +61,10 @@ void init_fpga(void)
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do
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do
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{
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{
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uint8_t value = *fpga_data++;
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uint8_t value = *fpga_data++;
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for (i = 0; i < 8; i++)
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for (i = 0; i < 8; i++, value >>= 1)
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{
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{
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if ((value << i) & 0b10000000)
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if (value & 1)
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{
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{
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/* bit set -> toggle DATA0 to high */
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/* bit set -> toggle DATA0 to high */
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MCF_GPIO_PODR_FEC1L |= FPGA_DATA0;
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MCF_GPIO_PODR_FEC1L |= FPGA_DATA0;
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