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enabled faster clocking rate on cards that support it and did some transfer timing tests

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This commit is contained in:
Markus Fröschle
2012-12-16 10:51:50 +00:00
parent d9f3c5e3c5
commit 05f6a79afc
3 changed files with 28 additions and 3 deletions
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4
BaS_gcc/sources/mmc.c
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@@ -29,10 +29,10 @@
MCF_DSPI_DCTAR_PCSSCK(0b01) | /* 3 clock DSPICS to DSPISCK delay prescaler */ \
MCF_DSPI_DCTAR_PASC_3CLK | /* 3 clock DSPISCK to DSPICS negation prescaler */ \
MCF_DSPI_DCTAR_PDT_3CLK | /* 3 clock delay between DSPICS assertions prescaler */ \
MCF_DSPI_DCTAR_PBR_3CLK | /* 3 clock prescaler */ \
MCF_DSPI_DCTAR_PBR_1CLK | /* 1 clock prescaler */ \
MCF_DSPI_DCTAR_ASC(0b1001) | /* 1024 */ \
MCF_DSPI_DCTAR_DT(0b1001) | /* 1024 */ \
MCF_DSPI_DCTAR_BR(0b0000); }
MCF_DSPI_DCTAR_BR(0b0001); }
#define SPICLK_SLOW() { MCF_DSPI_DCTAR0 = MCF_DSPI_DCTAR_TRSZ(0b111) | /* transfer size = 8 bit */ \
MCF_DSPI_DCTAR_PCSSCK(0b01) | /* 3 clock DSPICS to DSPISCK delay prescaler */ \