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improved timing, added timing constraints, got rid of CLK_33M

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Design compiles and runs, but still has issues with different screen resolutions and video clocks
This commit is contained in:
Markus Fröschle
2015-09-23 09:49:05 +00:00
parent ca251a2cf1
commit 03a110f03b
19 changed files with 1631 additions and 1519 deletions
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152
altpll4.bsf
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@@ -4,7 +4,7 @@ editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2010 Altera Corporation
Copyright (C) 1991-2014 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
@@ -18,108 +18,108 @@ programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(header "symbol" (version "1.2"))
(symbol
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(text "altpll4" (rect 168 1 215 20)(font "Arial" (font_size 10)))
(text "inst" (rect 8 213 31 228)(font "Arial" ))
(rect 0 0 312 184)
(text "altpll4" (rect 139 0 179 16)(font "Arial" (font_size 10)))
(text "inst" (rect 8 168 25 180)(font "Arial" ))
(port
(pt 0 72)
(pt 0 64)
(input)
(text "inclk0" (rect 0 0 40 16)(font "Arial" (font_size 8)))
(text "inclk0" (rect 4 56 38 72)(font "Arial" (font_size 8)))
(line (pt 0 72)(pt 88 72)(line_width 1))
(text "inclk0" (rect 0 0 31 14)(font "Arial" (font_size 8)))
(text "inclk0" (rect 4 50 29 63)(font "Arial" (font_size 8)))
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)
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(line (pt 0 96)(pt 72 96))
)
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