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FPGA_Config/FPGA_by_Fredi/Video/BLITTER/altsyncram0_waveforms.html
David Gálvez 68129dbe57 Sync with Fredi's source tree 13/06/2015
Parallel port fix.
2018-04-09 17:19:13 +02:00

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<title>Sample Waveforms for "altsyncram0.tdf" </title>
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<h2><CENTER>Sample behavioral waveforms for design file "altsyncram0.tdf" </CENTER></h2>
<P>The following waveforms show the behavior of altsyncram megafunction for the chosen set of parameters in design "altsyncram0.tdf". For the purpose of this simulation, the contents of the memory at the start of the sample waveforms is assumed to be ( FFF0, FFF1, FFF2, FFF3, ...). The design "altsyncram0.tdf" has </P>
<CENTER><img src=altsyncram0_wave0.jpg> </CENTER>
<P><CENTER><FONT size=2>Fig. 1 : Wave showing read operation. </CENTER></P>
<P><FONT size=3>The above waveform shows the behavior of the design under normal read conditions. The read happens at the rising edge of the enabled clock cycle. The output from the RAM is undefined until after the first rising edge of the read clock. </P>
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