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FPGA_Config/FPGA_Quartus_13.1/video/altdpram1.inc
2016-07-29 06:29:14 +00:00

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PHP

--Copyright (C) 1991-2008 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any output files from any of the foregoing
--(including device programming or simulation files), and any
--associated documentation or information are expressly subject
--to the terms and conditions of the Altera Program License
--Subscription Agreement, Altera MegaCore Function License
--Agreement, or other applicable license agreement, including,
--without limitation, that your use is for the sole purpose of
--programming logic devices manufactured by Altera and sold by
--Altera or its authorized distributors. Please refer to the
--applicable agreement for further details.
FUNCTION altdpram1
(
address_a[7..0],
address_b[7..0],
clock_a,
clock_b,
data_a[5..0],
data_b[5..0],
wren_a,
wren_b
)
RETURNS (
q_a[5..0],
q_b[5..0]
);