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FPGA_Config/FPGA_30_11_2018/Video/altddio_out0.ppf
2025-09-02 14:32:05 +02:00

12 lines
498 B
XML

<?xml version="1.0" encoding="UTF-8" ?>
<!DOCTYPE pinplan>
<pinplan intended_family="Cyclone III" variation_name="altddio_out0" megafunction_name="ALTDDIO_OUT" specifies="all_ports">
<global>
<pin name="datain_h[3..0]" direction="input" scope="external" />
<pin name="datain_l[3..0]" direction="input" scope="external" />
<pin name="outclock" direction="input" scope="external" source="clock" />
<pin name="dataout[3..0]" direction="output" scope="external" />
</global>
</pinplan>