-- WARNING: Do NOT edit the input and output ports in this file in a text -- editor if you plan to continue editing the block that represents it in -- the Block Editor! File corruption is VERY likely to occur. -- Copyright (C) 1991-2010 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and any output files from any of the foregoing -- (including device programming or simulation files), and any -- associated documentation or information are expressly subject -- to the terms and conditions of the Altera Program License -- Subscription Agreement, Altera MegaCore Function License -- Agreement, or other applicable license agreement, including, -- without limitation, that your use is for the sole purpose of -- programming logic devices manufactured by Altera and sold by -- Altera or its authorized distributors. Please refer to the -- applicable agreement for further details. -- Generated by Quartus II Version 9.1 (Build Build 350 03/24/2010) -- Created on Sat Jan 15 11:06:17 2011 INCLUDE "lpm_bustri_WORD.inc"; INCLUDE "VIDEO/BLITTER/lpm_clshift0.INC"; INCLUDE "VIDEO/BLITTER/altsyncram0.INC"; CONSTANT BL_SKEW_LF = 255; -- Title Statement (optional) TITLE "Blitter"; -- Parameters Statement (optional) -- {{ALTERA_PARAMETERS_BEGIN}} DO NOT REMOVE THIS LINE! -- {{ALTERA_PARAMETERS_END}} DO NOT REMOVE THIS LINE! -- Subdesign Section SUBDESIGN BLITTER ( -- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE! nRSTO : INPUT; MAIN_CLK : INPUT; FB_ALE : INPUT; nFB_WR : INPUT; nFB_OE : INPUT; FB_SIZE0 : INPUT; FB_SIZE1 : INPUT; VIDEO_RAM_CTR[15..0] : INPUT; BLITTER_ON : INPUT; FB_ADR[31..0] : INPUT; nFB_CS1 : INPUT; nFB_CS2 : INPUT; nFB_CS3 : INPUT; DDRCLK0 : INPUT; BLITTER_DIN[127..0] : INPUT; BLITTER_DACK[4..0] : INPUT; SR_BLITTER_DACK : INPUT; BLITTER_RUN : OUTPUT; BLITTER_DOUT[127..0] : OUTPUT; BLITTER_ADR[31..0] : OUTPUT; BLITTER_SIG : OUTPUT; BLITTER_WR : OUTPUT; BLITTER_TA : OUTPUT; FB_AD[31..0] : BIDIR; -- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE! ) VARIABLE FB_B[3..0] :NODE; FB_16B[1..0] :NODE; BLITTER_CS :NODE; BL_BUSY :NODE; BL_HRAM_CS :NODE; BL_HRAM_ADR[3..0] :NODE; BL_HRAM_OUT[15..0] :NODE; BL_HRAM_BE[1..0] :NODE; BL_SRC_X_INC_CS :NODE; BL_SRC_X_INC[15..0] :DFFE; BL_SRC_Y_INC_CS :NODE; BL_SRC_Y_INC[15..0] :DFFE; BL_ENDMASK1_CS :NODE; BL_ENDMASK1[15..0] :DFFE; BL_ENDMASK2_CS :NODE; BL_ENDMASK2[15..0] :DFFE; BL_ENDMASK3_CS :NODE; BL_ENDMASK3[15..0] :DFFE; BL_SRC_ADRH_CS :NODE; BL_SRC_ADRL_CS :NODE; BL_SRC_ADR[31..0] :DFFE; BL_DST_X_INC_CS :NODE; BL_DST_X_INC[15..0] :DFFE; BL_DST_Y_INC_CS :NODE; BL_DST_Y_INC[15..0] :DFFE; BL_DST_ADRH_CS :NODE; BL_DST_ADRL_CS :NODE; BL_DST_ADR[31..0] :DFFE; BL_X_CNT_CS :NODE; BL_X_CNT[15..0] :DFFE; BL_Y_CNT_CS :NODE; BL_Y_CNT[15..0] :DFFE; BL_HT_OP_CS :NODE; BL_HT_OP[7..0] :DFFE; BL_LC_OP[7..0] :DFFE; BL_LN_CS :NODE; BL_LN[7..0] :DFFE; BL_SKEW[7..0] :DFFE; BL_SKEW_EXT[6..0] :NODE; BL_SKEW_IN[255..0] :DFFE; BL_SKEW_OUT[255..0] :NODE; BL_DATA_DDR_READY :DFF; -- 1 WENN DATEN GESCHRIEBEN ODER LESBAR BL_READ_SRC :DFFE; BL_DST_BUFFER[127..0] :DFFE; BL_READ_DST :DFFE; HOP_OUT[127..0] :NODE; COUNT[18..0] :DFF; BEGIN -- BYT SELECT 32 BIT FB_B0 = FB_ADR[1..0]==0; -- ADR==0 FB_B1 = FB_ADR[1..0]==1 -- ADR==1 # FB_SIZE1 & !FB_SIZE0 & !FB_ADR1 -- HIGH WORD # FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE FB_B2 = FB_ADR[1..0]==2 -- ADR==2 # FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE FB_B3 = FB_ADR[1..0]==3 -- ADR==3 # FB_SIZE1 & !FB_SIZE0 & FB_ADR1 -- LOW WORD # FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE -- BYT SELECT 16 BIT FB_16B0 = FB_ADR[0]==0; -- ADR==0 FB_16B1 = FB_ADR[0]==1 -- ADR==1 # !(!FB_SIZE1 & FB_SIZE0); -- NOT BYT -- BLITTER CS BLITTER_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..6]==H"3E28"; -- FFFF8A00-3F/40 BLITTER_TA = BLITTER_CS; -- REGISTER -- HALFTON RAM BL_HRAM_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..5]==H"7C50"; -- $F8A00/20 BL_HRAM_BE1 = BL_HRAM_CS & FB_16B0 # !BL_HRAM_CS; BL_HRAM_BE0 = BL_HRAM_CS & FB_16B1 # !BL_HRAM_CS; BL_HRAM_ADR[] = BL_HRAM_CS & FB_ADR[4..1] # !BL_HRAM_CS & BL_LN[3..0]; BL_HRAM_OUT[] = altsyncram0(BL_HRAM_ADR[],BL_HRAM_BE[],DDRCLK0,FB_AD[31..16],BL_HRAM_CS & !nFB_WR); -- SRC X INC BL_SRC_X_INC[].CLK = MAIN_CLK; BL_SRC_X_INC[] = !BL_BUSY & FB_AD[31..16]; BL_SRC_X_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C510"; -- $F8A20/2 BL_SRC_X_INC[15..8].ENA = BL_SRC_X_INC_CS & !nFB_WR & FB_16B0; BL_SRC_X_INC[7..0].ENA = BL_SRC_X_INC_CS & !nFB_WR & FB_16B1; -- SRC Y INC BL_SRC_Y_INC[].CLK = MAIN_CLK; BL_SRC_Y_INC[] = !BL_BUSY & FB_AD[31..16]; BL_SRC_Y_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C511"; -- $F8A22/2 BL_SRC_Y_INC[15..8].ENA = BL_SRC_Y_INC_CS & !nFB_WR & FB_16B0; BL_SRC_Y_INC[7..0].ENA = BL_SRC_Y_INC_CS & !nFB_WR & FB_16B1; -- SRC ADR HIGH BL_SRC_ADR[].CLK = MAIN_CLK; BL_SRC_ADR[31..16] = !BL_BUSY & FB_AD[31..16]; BL_SRC_ADRH_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C512"; -- $F8A24/2 BL_SRC_ADR[31..24].ENA = BL_SRC_ADRH_CS & !nFB_WR & FB_16B0; BL_SRC_ADR[23..16].ENA = BL_SRC_ADRH_CS & !nFB_WR & FB_16B1; -- SRC ADR LOW BL_SRC_ADR[].CLK = MAIN_CLK; BL_SRC_ADR[15..0] = !BL_BUSY & FB_AD[31..16]; BL_SRC_ADRL_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C513"; -- $F8A26/2 BL_SRC_ADR[15..8].ENA = BL_SRC_ADRL_CS & !nFB_WR & FB_16B0; BL_SRC_ADR[7..0].ENA = BL_SRC_ADRL_CS & !nFB_WR & FB_16B1; -- ENDMASK 1 BL_ENDMASK1[].CLK = MAIN_CLK; BL_ENDMASK1[] = FB_AD[31..16]; BL_ENDMASK1_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C514"; -- $F8A28/2 BL_ENDMASK1[15..8].ENA = BL_ENDMASK1_CS & !nFB_WR & FB_16B0; BL_ENDMASK1[7..0].ENA = BL_ENDMASK1_CS & !nFB_WR & FB_16B1; -- ENDMASK 2 BL_ENDMASK2[].CLK = MAIN_CLK; BL_ENDMASK2[] = FB_AD[31..16]; BL_ENDMASK2_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C515"; -- $F8A2A/2 BL_ENDMASK2[15..8].ENA = BL_ENDMASK2_CS & !nFB_WR & FB_16B0; BL_ENDMASK2[7..0].ENA = BL_ENDMASK2_CS & !nFB_WR & FB_16B1; -- ENDMASK 3 BL_ENDMASK3[].CLK = MAIN_CLK; BL_ENDMASK3[] = FB_AD[31..16]; BL_ENDMASK3_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C516"; -- $F8A2C/2 BL_ENDMASK3[15..8].ENA = BL_ENDMASK3_CS & !nFB_WR & FB_16B0; BL_ENDMASK3[7..0].ENA = BL_ENDMASK3_CS & !nFB_WR & FB_16B1; -- DST X INC BL_DST_X_INC[].CLK = MAIN_CLK; BL_DST_X_INC[] = !BL_BUSY & FB_AD[31..16]; BL_DST_X_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C517"; -- $F8A2E/2 BL_DST_X_INC[15..8].ENA = BL_DST_X_INC_CS & !nFB_WR & FB_16B0; BL_DST_X_INC[7..0].ENA = BL_DST_X_INC_CS & !nFB_WR & FB_16B1; -- DST Y INC BL_DST_Y_INC[].CLK = MAIN_CLK; BL_DST_Y_INC[] = !BL_BUSY & FB_AD[31..16]; BL_DST_Y_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C518"; -- $F8A30/2 BL_DST_Y_INC[15..8].ENA = BL_DST_Y_INC_CS & !nFB_WR & FB_16B0; BL_DST_Y_INC[7..0].ENA = BL_DST_Y_INC_CS & !nFB_WR & FB_16B1; -- DST ADR HIGH BL_DST_ADR[].CLK = MAIN_CLK; BL_DST_ADR[31..16] = !BL_BUSY & FB_AD[31..16]; BL_DST_ADRH_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C512"; -- $F8A24/2 BL_DST_ADR[31..24].ENA = BL_DST_ADRH_CS & !nFB_WR & FB_16B0; BL_DST_ADR[23..16].ENA = BL_DST_ADRH_CS & !nFB_WR & FB_16B1; -- DST ADR LOW BL_DST_ADR[].CLK = MAIN_CLK; BL_DST_ADR[15..0] = !BL_BUSY & FB_AD[31..16]; BL_DST_ADRL_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C513"; -- $F8A26/2 BL_DST_ADR[15..8].ENA = BL_DST_ADRL_CS & !nFB_WR & FB_16B0; BL_DST_ADR[7..0].ENA = BL_DST_ADRL_CS & !nFB_WR & FB_16B1; -- X COUNT BL_X_CNT[].CLK = MAIN_CLK; BL_X_CNT[] = !BL_BUSY & FB_AD[31..16]; BL_X_CNT_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51B"; -- $F8A36/2 BL_X_CNT[15..8].ENA = BL_X_CNT_CS & !nFB_WR & FB_16B0; BL_X_CNT[7..0].ENA = BL_X_CNT_CS & !nFB_WR & FB_16B1; -- Y COUNT BL_Y_CNT[].CLK = MAIN_CLK; BL_Y_CNT[] = !BL_BUSY & FB_AD[31..16]; BL_Y_CNT_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51C"; -- $F8A38/2 BL_Y_CNT[15..8].ENA = BL_Y_CNT_CS & !nFB_WR & FB_16B0; BL_Y_CNT[7..0].ENA = BL_Y_CNT_CS & !nFB_WR & FB_16B1; -- HALFTONE OP BYT BL_HT_OP[].CLK = MAIN_CLK; BL_HT_OP[] = FB_AD[31..24]; BL_HT_OP_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51D"; -- $F8A3A/2 BL_HT_OP[7..0].ENA = BL_HT_OP_CS & !nFB_WR & FB_16B0; -- LOGIC OP BYT BL_LC_OP[].CLK = MAIN_CLK; BL_LC_OP[] = FB_AD[23..16]; BL_LC_OP[7..0].ENA = BL_HT_OP_CS & !nFB_WR & FB_16B1; -- $F8A3B -- LINE NUMBER BYT BL_LN[].CLK = MAIN_CLK; BL_LN[] = !BL_BUSY & FB_AD[31..24]; BL_LN_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51E"; -- $F8A3C/2 BL_LN[7..0].ENA = BL_LN_CS & !nFB_WR & FB_16B0; -- SKEW BYT BL_SKEW[].CLK = MAIN_CLK; BL_SKEW[] = FB_AD[31..24]; BL_SKEW[7..0].ENA = BL_LN_CS & !nFB_WR & FB_16B1; -- $F8A3D --- REGISTER OUT FB_AD[31..16] = lpm_bustri_WORD( BL_HRAM_CS & BL_HRAM_OUT[] # BL_SRC_X_INC_CS & BL_SRC_X_INC[] # BL_SRC_Y_INC_CS & BL_SRC_Y_INC[] # BL_SRC_ADRH_CS & BL_SRC_ADR[31..16] # BL_SRC_ADRL_CS & BL_SRC_ADR[15..0] # BL_ENDMASK1_CS & BL_ENDMASK1[] # BL_ENDMASK2_CS & BL_ENDMASK2[] # BL_ENDMASK3_CS & BL_ENDMASK3[] # BL_DST_X_INC_CS & BL_DST_X_INC[] # BL_DST_Y_INC_CS & BL_DST_Y_INC[] # BL_DST_ADRH_CS & BL_DST_ADR[31..16] # BL_DST_ADRL_CS & BL_DST_ADR[15..0] # BL_X_CNT_CS & BL_X_CNT[] # BL_Y_CNT_CS & BL_Y_CNT[] # BL_HT_OP_CS & (BL_HT_OP[],BL_LC_OP[]) # BL_LN_CS & (BL_LN[],BL_SKEW[]) ,BLITTER_CS & !nFB_OE); -- FFFF8A00-3F/40 ----------------------------------------- -- BL_READ_SRC.CLK = DDRCLK0; BL_READ_DST.CLK = DDRCLK0; -- READY SIGNAL 1 CLOCK SPÄTER BL_DATA_DDR_READY.CLK = DDRCLK0; BL_DATA_DDR_READY = BL_DATA_DDR_READY & BLITTER_DACK0; -- SRC BUFFER LADEN BL_SKEW_IN[].CLK = DDRCLK0; BL_SKEW_IN[].ENA = BL_DATA_DDR_READY & BL_READ_SRC; BL_SKEW_IN[255..128] = BLITTER_DIN[]; BL_SKEW_IN[127..0] = BL_SKEW_IN[255..128]; -- DST BUFFER LADEN BL_DST_BUFFER[].CLK = DDRCLK0; BL_DST_BUFFER[].ENA = BL_DATA_DDR_READY & BL_READ_DST; BL_DST_BUFFER[] = BLITTER_DIN[]; -- SKEW EXTENDET BL_SKEW_EXT[6..4] = BL_SRC_ADR[3..1]; BL_SKEW_EXT[3..0] = BL_SKEW[3..0]; -- SKEW EXT MUX BL_SKEW_OUT[] = lpm_clshift0(BL_SKEW_IN[],BL_SKEW_EXT[]); -- BIT 127..0 SIND RELEVANT -- HOP IF BL_HT_OP[1..0]==B"00" THEN HOP_OUT[] = H"FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"; ELSE IF BL_HT_OP[1..0]==B"01" THEN HOP_OUT[] = (BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[]); ELSE IF BL_HT_OP[1..0]==B"10" THEN HOP_OUT[] = BL_SKEW_OUT[127..0]; ELSE HOP_OUT[] = BL_SKEW_OUT[127..0] & (BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[]); END IF; END IF; END IF; BLITTER_RUN = gnd; --VCC; BLITTER_SIG = gnd; --VCC; BLITTER_WR = gnd; --VCC; COUNT[] = COUNT[] + 16; COUNT[].CLK = BLITTER_DACK0; BLITTER_DOUT[] = H"112233445566778899AABBCCDDEEFF00"; BLITTER_ADR[] = (0, COUNT[]) + 400000; END;