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add config from 30-11-2018

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ragnar
2025-09-02 14:32:05 +02:00
parent 2f7c3d93aa
commit 3867bb63da
459 changed files with 75776 additions and 0 deletions
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112
FPGA_30_11_2018/altpll3.bsf Normal file
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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2010 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
(rect 0 0 272 200)
(text "altpll3" (rect 119 0 159 16)(font "Arial" (font_size 10)))
(text "inst" (rect 8 184 25 196)(font "Arial" ))
(port
(pt 0 64)
(input)
(text "inclk0" (rect 0 0 31 14)(font "Arial" (font_size 8)))
(text "inclk0" (rect 4 51 31 64)(font "Arial" (font_size 8)))
(line (pt 0 64)(pt 40 64)(line_width 1))
)
(port
(pt 272 64)
(output)
(text "c0" (rect 0 0 14 14)(font "Arial" (font_size 8)))
(text "c0" (rect 257 51 268 64)(font "Arial" (font_size 8)))
(line (pt 272 64)(pt 224 64)(line_width 1))
)
(port
(pt 272 80)
(output)
(text "c1" (rect 0 0 14 14)(font "Arial" (font_size 8)))
(text "c1" (rect 257 67 268 80)(font "Arial" (font_size 8)))
(line (pt 272 80)(pt 224 80)(line_width 1))
)
(port
(pt 272 96)
(output)
(text "c2" (rect 0 0 14 14)(font "Arial" (font_size 8)))
(text "c2" (rect 257 83 268 96)(font "Arial" (font_size 8)))
(line (pt 272 96)(pt 224 96)(line_width 1))
)
(port
(pt 272 112)
(output)
(text "c3" (rect 0 0 14 14)(font "Arial" (font_size 8)))
(text "c3" (rect 257 99 268 112)(font "Arial" (font_size 8)))
(line (pt 272 112)(pt 224 112)(line_width 1))
)
(port
(pt 272 128)
(output)
(text "locked" (rect 0 0 36 14)(font "Arial" (font_size 8)))
(text "locked" (rect 238 115 268 128)(font "Arial" (font_size 8)))
(line (pt 272 128)(pt 224 128)(line_width 1))
)
(drawing
(text "Cyclone III" (rect 211 185 258 197)(font "Arial" ))
(text "inclk0 frequency: 33.000 MHz" (rect 50 59 175 71)(font "Arial" ))
(text "Operation Mode: Src Sync Comp" (rect 50 73 188 85)(font "Arial" ))
(text "Clk " (rect 51 96 68 108)(font "Arial" ))
(text "Ratio" (rect 81 96 103 108)(font "Arial" ))
(text "Ph (dg)" (rect 116 96 146 108)(font "Arial" ))
(text "DC (%)" (rect 151 96 182 108)(font "Arial" ))
(text "c0" (rect 54 111 64 123)(font "Arial" ))
(text "25/33" (rect 81 111 104 123)(font "Arial" ))
(text "0.00" (rect 122 111 140 123)(font "Arial" ))
(text "50.00" (rect 155 111 178 123)(font "Arial" ))
(text "c1" (rect 54 126 64 138)(font "Arial" ))
(text "2/33" (rect 83 126 101 138)(font "Arial" ))
(text "0.00" (rect 122 126 140 138)(font "Arial" ))
(text "50.00" (rect 155 126 178 138)(font "Arial" ))
(text "c2" (rect 54 141 64 153)(font "Arial" ))
(text "1/66" (rect 83 141 101 153)(font "Arial" ))
(text "0.00" (rect 122 141 140 153)(font "Arial" ))
(text "50.00" (rect 155 141 178 153)(font "Arial" ))
(text "c3" (rect 54 156 64 168)(font "Arial" ))
(text "512/6875" (rect 73 156 111 168)(font "Arial" ))
(text "0.00" (rect 122 156 140 168)(font "Arial" ))
(text "50.00" (rect 155 156 178 168)(font "Arial" ))
(line (pt 0 0)(pt 273 0)(line_width 1))
(line (pt 273 0)(pt 273 201)(line_width 1))
(line (pt 0 201)(pt 273 201)(line_width 1))
(line (pt 0 0)(pt 0 201)(line_width 1))
(line (pt 48 94)(pt 184 94)(line_width 1))
(line (pt 48 108)(pt 184 108)(line_width 1))
(line (pt 48 123)(pt 184 123)(line_width 1))
(line (pt 48 138)(pt 184 138)(line_width 1))
(line (pt 48 153)(pt 184 153)(line_width 1))
(line (pt 48 168)(pt 184 168)(line_width 1))
(line (pt 48 94)(pt 48 168)(line_width 1))
(line (pt 70 94)(pt 70 168)(line_width 3))
(line (pt 113 94)(pt 113 168)(line_width 3))
(line (pt 148 94)(pt 148 168)(line_width 3))
(line (pt 183 94)(pt 183 168)(line_width 1))
(line (pt 40 48)(pt 224 48)(line_width 1))
(line (pt 224 48)(pt 224 184)(line_width 1))
(line (pt 40 184)(pt 224 184)(line_width 1))
(line (pt 40 48)(pt 40 184)(line_width 1))
)
)