b2f1b22335
-moved all includes into "include" directory -extracted "wait...()"-routines into separate files
264 lines
4.5 KiB
C
264 lines
4.5 KiB
C
/*****************************************************************************************/
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// functionen macros: fehlende adressierungsarte (MCF nur Dx support) ohne ax
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// zusammen mit op.h
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/*****************************************************************************************/
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ii_lset_opc:.macro
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ii_lset_opeag \1,c // dx,ax
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ii_lset_opea \1,d // (ax), (ax)+
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ii_lset_opea \1,e // -(ax),d16(ax)
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ii_lset_opeag \1,f // d8(ax,dy)
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lea table+0x\1b8*4,a0
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move.l #ii_0x\1b8,(a0)+ // xxx.w
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move.l #ii_0x\1b9,(a0)+ // xxx.l
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.endm
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/******************************************************/
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ii_opc:.macro // 1=code 2=operation 3 = normal oder immediat
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opcdx \1,\2,l,c,\3 // dx,ax
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opia \1,\2,l,d,\3 // (ax),(ax)+
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opdia \1,\2,l,e,\3 // -(ax),d16(ax)
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opd8a \1,\2,l,f,\3 // d8(ax),xxx
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.endm
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//*******************************************************************************3
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/******************************************************/
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// byt word long
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/******************************************************/
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opcdx: .macro //register: \1=code \2 = operation \3 = size \4=size and adressierungsart 5 = immediate oder normal
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ii_0x\1\40:
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#ifdef halten_opc
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halt
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#endif
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.ifc \3,b
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op\5smd \2,d0_off+3(a7),d0_off+3(a7),\3
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.else
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.ifc \3,w
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op\5smd \2,d0_off+2(a7),d0_off+2(a7),\3
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.else
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op\5smd \2,d0_off(a7),d0_off(a7),\3
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.endif
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.endif
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ii_0x\1\41:
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.ifc \3,b
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op\5smd \2,d1_off+3(a7),d1_off+3(a7),\3
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.else
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.ifc \3,w
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op\5smd \2,d1_off+2(a7),d1_off+2(a7),\3
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.else
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op\5smd \2,d1_off(a7),d1_off(a7),\3
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.endif
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.endif
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ii_0x\1\42:
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op\5smd \2,d2,d2,\3
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ii_0x\1\43:
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op\5smd \2,d3,d3,\3
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ii_0x\1\44:
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op\5smd \2,d4,d4,\3
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ii_0x\1\45:
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op\5smd \2,d5,d5,\3
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ii_0x\1\46:
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op\5smd \2,d6,d6,\3
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ii_0x\1\47:
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op\5smd \2,d7,d7,\3
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.endm
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//-----------------------------------------------------
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opcsmd:.macro // dx: 1=opieration 2=ea src 3=ea dest 4=size
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#ifdef halten_opc
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halt
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#endif
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.ifc \4,l
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move.l (a0)+,d0
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.else
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.ifc \4,w
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mvs.w (a0)+,d0
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.else
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move.w (a0)+,d0
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extb.l d0
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.endif
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.endif
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.ifc \4,l
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move.l \2,d1
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.else
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mvs.\4 \2,d1
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.endif
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.ifc \1,eor.l d0
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move.l d0_off(a7),d1
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.endif
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.ifc \1,eor.l d1
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move.l d1_off(a7),d1
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.endif
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\1 d1
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set_cc0
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move.\4 d1,\3
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ii_end
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.endm;
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opacsmd:.macro // ax: 1=opieration 2=ea src 3=ea dest 4=size
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#ifdef halten_opc
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halt
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#endif
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.ifc \4,l
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move.l (a0)+,d0
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.else
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.ifc \4,w
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mvs.w (a0)+,d0
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.else
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move.w (a0)+,d0
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extb.l d0
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.endif
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.endif
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.ifc \2,usp
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move.l usp,a1
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move.l a1,d1
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.else
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move.l \2,d1
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.endif
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\1 d1
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set_cc0
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.ifc \3,usp
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move.l d1,a1
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move.l a1,usp
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.else
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move.l d1,\3
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.endif
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ii_end
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.endm;
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opcsia:.macro // (ax) (ax)+ -(ax): 1=opieration 2=adress register 3= src 4=dest 5=size
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#ifdef halten_opc
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halt
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#endif
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.ifc \4,l
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move.l (a0)+,d0
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.else
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.ifc \4,w
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mvs.w (a0)+,d0
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.else
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move.w (a0)+,d0
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extb.l d0
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.endif
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.endif
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move.l \2,a1
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.ifc \5,l
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move.l \3,d1
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.else
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mvs.\5 \3,d1
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.endif
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.ifc \1,eor.l d0
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move.l d0_off(a7),d1
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.endif
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.ifc \1,eor.l d1
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move.l d1_off(a7),d1
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.endif
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\1 d1
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set_cc0
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move.\5 d1,\4
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ii_end
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.endm;
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opcsd16a:.macro // d16(ax): 1=opieration 2=adress register 3=size
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#ifdef halten_opc
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halt
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#endif
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.ifc \4,l
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move.l (a0)+,d0
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.else
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.ifc \4,w
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mvs.w (a0)+,d0
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.else
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move.w (a0)+,d0
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extb.l d0
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.endif
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.endif
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move.l \2,a1
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mvs.w (a0)+,d1
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add.l d1,a1
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.ifc \3,l
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move.l (a1),d1
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.else
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mvs.\3 (a1),d1
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.endif
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.ifc \1,eor.l d0
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move.l d0_off(a7),d1
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.endif
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.ifc \1,eor.l d1
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move.l d1_off(a7),d1
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.endif
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\1 d1
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set_cc0
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move.\3 d1,(a1)
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ii_end
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.endm;
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opcsd8a:.macro // indirect: 1=opieration 2=adress register 3=size
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#ifdef halten_opc
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halt
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#endif
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.ifc \4,l
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move.l (a0)+,d0
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.else
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.ifc \4,w
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mvs.w (a0)+,d0
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.else
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move.w (a0)+,d0
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extb.l d0
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.endif
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.endif
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move.l d0,_d0_save
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move.l \2,a1
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jsr ewf
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move.l _d0_save,d0
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.ifc \3,l
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move.l (a1),d1
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.else
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mvs.\3 (a1),d1
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.endif
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.ifc \1,eor.l d0
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move.l d0_off(a7),d1
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.endif
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.ifc \1,eor.l d1
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move.l d1_off(a7),d1
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.endif
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\1 d1
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set_cc0
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move.\3 d1,(a1)
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ii_end
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.endm;
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opcsxx:.macro // indirect: 1=opieration 2=size 3=size adresse
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#ifdef halten_opc
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halt
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#endif
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.ifc \2,l
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move.l (a0)+,d0
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.else
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.ifc \2,w
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mvs.w (a0)+,d0
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.else
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move.w (a0)+,d0
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extb.l d0
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.endif
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.endif
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move.\3 (a0)+,a1
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.ifc \2,l
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move.l (a1),d1
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.else
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mvs.\2 (a1),d1
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.endif
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.ifc \1,eor.l d0
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move.l d0_off(a7),d1
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.endif
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.ifc \1,eor.l d1
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move.l d1_off(a7),d1
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.endif
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\1 d1
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set_cc0
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move.\2 d1,(a1)
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ii_end
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.endm;
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