1000 lines
22 KiB
C
1000 lines
22 KiB
C
/****************************************************************************
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*
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* Realmode X86 Emulator Library
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*
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* Copyright (C) 1991-2004 SciTech Software, Inc.
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* Copyright (C) David Mosberger-Tang
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* Copyright (C) 1999 Egbert Eich
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*
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* ========================================================================
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*
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* Permission to use, copy, modify, distribute, and sell this software and
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* its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
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* both that copyright notice and this permission notice appear in
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* supporting documentation, and that the name of the authors not be used
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* in advertising or publicity pertaining to distribution of the software
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* without specific, written prior permission. The authors makes no
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* representations about the suitability of this software for any purpose.
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* It is provided "as is" without express or implied warranty.
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*
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* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
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* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
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* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*
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* ========================================================================
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*
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* Language: ANSI C
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* Environment: Any
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* Developer: Kendall Bennett
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*
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* Description: This file contains the code to implement the decoding and
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* emulation of the FPU instructions.
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*
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****************************************************************************/
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#include "x86debug.h"
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#include "x86emui.h"
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#include "x86fpu.h"
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#include "x86fpu_regs.h"
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/*----------------------------- Implementation ----------------------------*/
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/* opcode=0xd8 */
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void x86emuOp_esc_coprocess_d8(uint8_t X86EMU_UNUSED(op1))
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{
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START_OF_INSTR();
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DECODE_PRINTF("ESC D8\r\n");
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DECODE_CLEAR_SEGOVR();
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END_OF_INSTR_NO_TRACE();
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}
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#ifdef DBG_X86EMU
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static char *x86emu_fpu_op_d9_tab[] =
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{
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"FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
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"FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
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"FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
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"FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
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"FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
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"FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
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};
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static char *x86emu_fpu_op_d9_tab1[] =
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{
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"FLD\t", "FLD\t", "FLD\t", "FLD\t",
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"FLD\t", "FLD\t", "FLD\t", "FLD\t",
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"FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t",
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"FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t",
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"FNOP", "ESC_D9", "ESC_D9", "ESC_D9",
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"ESC_D9", "ESC_D9", "ESC_D9", "ESC_D9",
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"FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t",
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"FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t",
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"FCHS", "FABS", "ESC_D9", "ESC_D9",
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"FTST", "FXAM", "ESC_D9", "ESC_D9",
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"FLD1", "FLDL2T", "FLDL2E", "FLDPI",
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"FLDLG2", "FLDLN2", "FLDZ", "ESC_D9",
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"F2XM1", "FYL2X", "FPTAN", "FPATAN",
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"FXTRACT", "ESC_D9", "FDECSTP", "FINCSTP",
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"FPREM", "FYL2XP1", "FSQRT", "ESC_D9",
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"FRNDINT", "FSCALE", "ESC_D9", "ESC_D9",
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};
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#endif /* DBG_X86EMU */
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/* opcode=0xd9 */
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void x86emuOp_esc_coprocess_d9(uint8_t X86EMU_UNUSED(op1))
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{
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int mod, rl, rh;
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unsigned int destoffset;
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uint8_t stkelem;
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START_OF_INSTR();
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FETCH_DECODE_MODRM(mod, rh, rl);
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#ifdef DBG_X86EMU
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if (mod != 3)
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{
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DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl);
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}
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else
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{
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DECODE_PRINTF(x86emu_fpu_op_d9_tab1[(rh << 3) + rl]);
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}
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#endif
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switch (mod)
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{
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case 0:
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destoffset = decode_rm00_address(rl);
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DECODE_PRINTF("\r\n");
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break;
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case 1:
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destoffset = decode_rm01_address(rl);
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DECODE_PRINTF("\r\n");
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break;
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case 2:
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destoffset = decode_rm10_address(rl);
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DECODE_PRINTF("\r\n");
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break;
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case 3: /* register to register */
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stkelem = (uint8_t)rl;
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if (rh < 4)
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{
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DECODE_PRINTF2("ST(%d)\r\n", stkelem);
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}
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else
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{
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DECODE_PRINTF("\r\n");
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}
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break;
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}
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#ifdef X86EMU_FPU_PRESENT
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/* execute */
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switch (mod)
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{
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case 3:
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switch (rh)
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{
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case 0:
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x86emu_fpu_R_fld(X86EMU_FPU_STKTOP, stkelem);
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break;
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case 1:
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x86emu_fpu_R_fxch(X86EMU_FPU_STKTOP, stkelem);
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break;
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case 2:
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switch (rl)
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{
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case 0:
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x86emu_fpu_R_nop();
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break;
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default:
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x86emu_fpu_illegal();
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break;
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}
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case 3:
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x86emu_fpu_R_fstp(X86EMU_FPU_STKTOP, stkelem);
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break;
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case 4:
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switch (rl)
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{
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case 0:
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x86emu_fpu_R_fchs(X86EMU_FPU_STKTOP);
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break;
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case 1:
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x86emu_fpu_R_fabs(X86EMU_FPU_STKTOP);
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break;
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case 4:
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x86emu_fpu_R_ftst(X86EMU_FPU_STKTOP);
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break;
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case 5:
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x86emu_fpu_R_fxam(X86EMU_FPU_STKTOP);
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break;
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default:
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/* 2,3,6,7 */
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x86emu_fpu_illegal();
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break;
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}
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break;
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case 5:
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switch (rl)
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{
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case 0:
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x86emu_fpu_R_fld1(X86EMU_FPU_STKTOP);
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break;
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case 1:
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x86emu_fpu_R_fldl2t(X86EMU_FPU_STKTOP);
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break;
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case 2:
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x86emu_fpu_R_fldl2e(X86EMU_FPU_STKTOP);
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break;
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case 3:
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x86emu_fpu_R_fldpi(X86EMU_FPU_STKTOP);
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break;
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case 4:
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x86emu_fpu_R_fldlg2(X86EMU_FPU_STKTOP);
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break;
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case 5:
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x86emu_fpu_R_fldln2(X86EMU_FPU_STKTOP);
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break;
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case 6:
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x86emu_fpu_R_fldz(X86EMU_FPU_STKTOP);
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break;
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default:
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/* 7 */
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x86emu_fpu_illegal();
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break;
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}
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break;
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case 6:
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switch (rl)
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{
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case 0:
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x86emu_fpu_R_f2xm1(X86EMU_FPU_STKTOP);
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break;
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case 1:
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x86emu_fpu_R_fyl2x(X86EMU_FPU_STKTOP);
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break;
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case 2:
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x86emu_fpu_R_fptan(X86EMU_FPU_STKTOP);
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break;
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case 3:
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x86emu_fpu_R_fpatan(X86EMU_FPU_STKTOP);
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break;
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case 4:
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x86emu_fpu_R_fxtract(X86EMU_FPU_STKTOP);
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break;
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case 5:
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x86emu_fpu_illegal();
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break;
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case 6:
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x86emu_fpu_R_decstp();
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break;
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case 7:
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x86emu_fpu_R_incstp();
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break;
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}
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break;
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case 7:
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switch (rl)
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{
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case 0:
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x86emu_fpu_R_fprem(X86EMU_FPU_STKTOP);
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break;
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case 1:
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x86emu_fpu_R_fyl2xp1(X86EMU_FPU_STKTOP);
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break;
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case 2:
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x86emu_fpu_R_fsqrt(X86EMU_FPU_STKTOP);
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break;
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case 3:
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x86emu_fpu_illegal();
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break;
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case 4:
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x86emu_fpu_R_frndint(X86EMU_FPU_STKTOP);
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break;
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case 5:
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x86emu_fpu_R_fscale(X86EMU_FPU_STKTOP);
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break;
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case 6:
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case 7:
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default:
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x86emu_fpu_illegal();
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break;
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}
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break;
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default:
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switch (rh)
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{
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case 0:
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x86emu_fpu_M_fld(X86EMU_FPU_FLOAT, destoffset);
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break;
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case 1:
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x86emu_fpu_illegal();
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break;
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case 2:
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x86emu_fpu_M_fst(X86EMU_FPU_FLOAT, destoffset);
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break;
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case 3:
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x86emu_fpu_M_fstp(X86EMU_FPU_FLOAT, destoffset);
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break;
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case 4:
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x86emu_fpu_M_fldenv(X86EMU_FPU_WORD, destoffset);
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break;
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case 5:
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x86emu_fpu_M_fldcw(X86EMU_FPU_WORD, destoffset);
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break;
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case 6:
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x86emu_fpu_M_fstenv(X86EMU_FPU_WORD, destoffset);
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break;
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case 7:
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x86emu_fpu_M_fstcw(X86EMU_FPU_WORD, destoffset);
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break;
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}
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}
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}
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#endif /* X86EMU_FPU_PRESENT */
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DECODE_CLEAR_SEGOVR();
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END_OF_INSTR_NO_TRACE();
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}
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#ifdef DBG_X86EMU
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char *x86emu_fpu_op_da_tab[] =
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{
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"FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
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"FICOMP\tDWORD PTR ",
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"FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
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"FIDIVR\tDWORD PTR ",
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"FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
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"FICOMP\tDWORD PTR ",
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"FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
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"FIDIVR\tDWORD PTR ",
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"FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
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"FICOMP\tDWORD PTR ",
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"FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
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"FIDIVR\tDWORD PTR ",
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"ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ",
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"ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ",
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};
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#endif /* DBG_X86EMU */
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/* opcode=0xda */
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void x86emuOp_esc_coprocess_da(uint8_t X86EMU_UNUSED(op1))
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{
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int mod, rl, rh;
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unsigned int destoffset;
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uint8_t stkelem;
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START_OF_INSTR();
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FETCH_DECODE_MODRM(mod, rh, rl);
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DECODE_PRINTINSTR32(x86emu_fpu_op_da_tab, mod, rh, rl);
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switch (mod)
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{
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case 0:
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destoffset = decode_rm00_address(rl);
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DECODE_PRINTF("\r\n");
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break;
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case 1:
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destoffset = decode_rm01_address(rl);
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DECODE_PRINTF("\r\n");
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break;
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case 2:
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destoffset = decode_rm10_address(rl);
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DECODE_PRINTF("\r\n");
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break;
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case 3: /* register to register */
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stkelem = (uint8_t)rl;
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DECODE_PRINTF2("\tST(%d),ST\r\n", stkelem);
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break;
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}
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#ifdef X86EMU_FPU_PRESENT
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switch (mod)
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{
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case 3:
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x86emu_fpu_illegal();
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break;
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default:
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switch (rh)
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{
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case 0:
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x86emu_fpu_M_iadd(X86EMU_FPU_SHORT, destoffset);
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break;
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case 1:
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x86emu_fpu_M_imul(X86EMU_FPU_SHORT, destoffset);
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break;
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case 2:
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x86emu_fpu_M_icom(X86EMU_FPU_SHORT, destoffset);
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break;
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case 3:
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x86emu_fpu_M_icomp(X86EMU_FPU_SHORT, destoffset);
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break;
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case 4:
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x86emu_fpu_M_isub(X86EMU_FPU_SHORT, destoffset);
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break;
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case 5:
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x86emu_fpu_M_isubr(X86EMU_FPU_SHORT, destoffset);
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break;
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case 6:
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x86emu_fpu_M_idiv(X86EMU_FPU_SHORT, destoffset);
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break;
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case 7:
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x86emu_fpu_M_idivr(X86EMU_FPU_SHORT, destoffset);
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break;
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}
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}
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#endif
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DECODE_CLEAR_SEGOVR();
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END_OF_INSTR_NO_TRACE();
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}
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#ifdef DBG_X86EMU
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char *x86emu_fpu_op_db_tab[] =
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{
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"FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
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"ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
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"FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
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"ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
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"FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
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"ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
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};
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#endif /* DBG_X86EMU */
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/* opcode=0xdb */
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void x86emuOp_esc_coprocess_db(uint8_t X86EMU_UNUSED(op1))
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{
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int mod, rl, rh;
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unsigned int destoffset;
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START_OF_INSTR();
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FETCH_DECODE_MODRM(mod, rh, rl);
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#ifdef DBG_X86EMU
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if (mod != 3)
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{
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DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl);
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}
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else if (rh == 4)
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{ /* === 11 10 0 nnn */
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switch (rl)
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{
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case 0:
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DECODE_PRINTF("FENI\r\n");
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break;
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case 1:
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DECODE_PRINTF("FDISI\r\n");
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break;
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case 2:
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DECODE_PRINTF("FCLEX\r\n");
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break;
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case 3:
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DECODE_PRINTF("FINIT\r\n");
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break;
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}
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}
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else
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{
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DECODE_PRINTF2("ESC_DB %0x\r\n", (mod << 6) + (rh << 3) + (rl));
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}
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#endif /* DBG_X86EMU */
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switch (mod)
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{
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case 0:
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destoffset = decode_rm00_address(rl);
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break;
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case 1:
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destoffset = decode_rm01_address(rl);
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break;
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case 2:
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destoffset = decode_rm10_address(rl);
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break;
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case 3: /* register to register */
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break;
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}
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#ifdef X86EMU_FPU_PRESENT
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/* execute */
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switch (mod)
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{
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case 3:
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switch (rh)
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{
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case 4:
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switch (rl)
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{
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case 0:
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x86emu_fpu_R_feni();
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break;
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case 1:
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x86emu_fpu_R_fdisi();
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break;
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case 2:
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x86emu_fpu_R_fclex();
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break;
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case 3:
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x86emu_fpu_R_finit();
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break;
|
|
default:
|
|
x86emu_fpu_illegal();
|
|
break;
|
|
}
|
|
break;
|
|
default:
|
|
x86emu_fpu_illegal();
|
|
break;
|
|
}
|
|
break;
|
|
default:
|
|
switch (rh)
|
|
{
|
|
case 0:
|
|
x86emu_fpu_M_fild(X86EMU_FPU_SHORT, destoffset);
|
|
break;
|
|
case 1:
|
|
x86emu_fpu_illegal();
|
|
break;
|
|
case 2:
|
|
x86emu_fpu_M_fist(X86EMU_FPU_SHORT, destoffset);
|
|
break;
|
|
case 3:
|
|
x86emu_fpu_M_fistp(X86EMU_FPU_SHORT, destoffset);
|
|
break;
|
|
case 4:
|
|
x86emu_fpu_illegal();
|
|
break;
|
|
case 5:
|
|
x86emu_fpu_M_fld(X86EMU_FPU_LDBL, destoffset);
|
|
break;
|
|
case 6:
|
|
x86emu_fpu_illegal();
|
|
break;
|
|
case 7:
|
|
x86emu_fpu_M_fstp(X86EMU_FPU_LDBL, destoffset);
|
|
break;
|
|
}
|
|
}
|
|
#endif
|
|
DECODE_CLEAR_SEGOVR();
|
|
END_OF_INSTR_NO_TRACE();
|
|
}
|
|
|
|
#ifdef DBG_X86EMU
|
|
char *x86emu_fpu_op_dc_tab[] =
|
|
{
|
|
"FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
|
|
"FCOMP\tQWORD PTR ",
|
|
"FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",
|
|
"FDIVR\tQWORD PTR ",
|
|
|
|
"FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
|
|
"FCOMP\tQWORD PTR ",
|
|
"FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",
|
|
"FDIVR\tQWORD PTR ",
|
|
|
|
"FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
|
|
"FCOMP\tQWORD PTR ",
|
|
"FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",
|
|
"FDIVR\tQWORD PTR ",
|
|
|
|
"FADD\t", "FMUL\t", "FCOM\t", "FCOMP\t",
|
|
"FSUBR\t", "FSUB\t", "FDIVR\t", "FDIV\t",
|
|
};
|
|
#endif /* DBG_X86EMU */
|
|
|
|
/* opcode=0xdc */
|
|
void x86emuOp_esc_coprocess_dc(uint8_t X86EMU_UNUSED(op1))
|
|
{
|
|
int mod, rl, rh;
|
|
unsigned int destoffset;
|
|
uint8_t stkelem;
|
|
|
|
START_OF_INSTR();
|
|
FETCH_DECODE_MODRM(mod, rh, rl);
|
|
DECODE_PRINTINSTR32(x86emu_fpu_op_dc_tab, mod, rh, rl);
|
|
switch (mod)
|
|
{
|
|
case 0:
|
|
destoffset = decode_rm00_address(rl);
|
|
DECODE_PRINTF("\r\n");
|
|
break;
|
|
case 1:
|
|
destoffset = decode_rm01_address(rl);
|
|
DECODE_PRINTF("\r\n");
|
|
break;
|
|
case 2:
|
|
destoffset = decode_rm10_address(rl);
|
|
DECODE_PRINTF("\r\n");
|
|
break;
|
|
case 3: /* register to register */
|
|
stkelem = (uint8_t)rl;
|
|
DECODE_PRINTF2("\tST(%d),ST\r\n", stkelem);
|
|
break;
|
|
}
|
|
#ifdef X86EMU_FPU_PRESENT
|
|
/* execute */
|
|
switch (mod)
|
|
{
|
|
case 3:
|
|
switch (rh)
|
|
{
|
|
case 0:
|
|
x86emu_fpu_R_fadd(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
case 1:
|
|
x86emu_fpu_R_fmul(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
case 2:
|
|
x86emu_fpu_R_fcom(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
case 3:
|
|
x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
case 4:
|
|
x86emu_fpu_R_fsubr(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
case 5:
|
|
x86emu_fpu_R_fsub(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
case 6:
|
|
x86emu_fpu_R_fdivr(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
case 7:
|
|
x86emu_fpu_R_fdiv(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
}
|
|
break;
|
|
default:
|
|
switch (rh)
|
|
{
|
|
case 0:
|
|
x86emu_fpu_M_fadd(X86EMU_FPU_DOUBLE, destoffset);
|
|
break;
|
|
case 1:
|
|
x86emu_fpu_M_fmul(X86EMU_FPU_DOUBLE, destoffset);
|
|
break;
|
|
case 2:
|
|
x86emu_fpu_M_fcom(X86EMU_FPU_DOUBLE, destoffset);
|
|
break;
|
|
case 3:
|
|
x86emu_fpu_M_fcomp(X86EMU_FPU_DOUBLE, destoffset);
|
|
break;
|
|
case 4:
|
|
x86emu_fpu_M_fsub(X86EMU_FPU_DOUBLE, destoffset);
|
|
break;
|
|
case 5:
|
|
x86emu_fpu_M_fsubr(X86EMU_FPU_DOUBLE, destoffset);
|
|
break;
|
|
case 6:
|
|
x86emu_fpu_M_fdiv(X86EMU_FPU_DOUBLE, destoffset);
|
|
break;
|
|
case 7:
|
|
x86emu_fpu_M_fdivr(X86EMU_FPU_DOUBLE, destoffset);
|
|
break;
|
|
}
|
|
}
|
|
#endif
|
|
DECODE_CLEAR_SEGOVR();
|
|
END_OF_INSTR_NO_TRACE();
|
|
}
|
|
|
|
#ifdef DBG_X86EMU
|
|
|
|
static char *x86emu_fpu_op_dd_tab[] =
|
|
{
|
|
"FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
|
|
"FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",
|
|
|
|
"FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
|
|
"FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",
|
|
|
|
"FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
|
|
"FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",
|
|
|
|
"FFREE\t", "FXCH\t", "FST\t", "FSTP\t",
|
|
"ESC_DD\t2C,", "ESC_DD\t2D,", "ESC_DD\t2E,", "ESC_DD\t2F,",
|
|
};
|
|
|
|
#endif /* DBG_X86EMU */
|
|
|
|
/* opcode=0xdd */
|
|
void x86emuOp_esc_coprocess_dd(uint8_t X86EMU_UNUSED(op1))
|
|
{
|
|
int mod, rl, rh;
|
|
unsigned int destoffset;
|
|
uint8_t stkelem;
|
|
|
|
START_OF_INSTR();
|
|
FETCH_DECODE_MODRM(mod, rh, rl);
|
|
DECODE_PRINTINSTR32(x86emu_fpu_op_dd_tab, mod, rh, rl);
|
|
switch (mod)
|
|
{
|
|
case 0:
|
|
destoffset = decode_rm00_address(rl);
|
|
DECODE_PRINTF("\r\n");
|
|
break;
|
|
case 1:
|
|
destoffset = decode_rm01_address(rl);
|
|
DECODE_PRINTF("\r\n");
|
|
break;
|
|
case 2:
|
|
destoffset = decode_rm10_address(rl);
|
|
DECODE_PRINTF("\r\n");
|
|
break;
|
|
case 3: /* register to register */
|
|
stkelem = (uint8_t)rl;
|
|
DECODE_PRINTF2("\tST(%d),ST\r\n", stkelem);
|
|
break;
|
|
}
|
|
#ifdef X86EMU_FPU_PRESENT
|
|
switch (mod)
|
|
{
|
|
case 3:
|
|
switch (rh)
|
|
{
|
|
case 0:
|
|
x86emu_fpu_R_ffree(stkelem);
|
|
break;
|
|
case 1:
|
|
x86emu_fpu_R_fxch(stkelem);
|
|
break;
|
|
case 2:
|
|
x86emu_fpu_R_fst(stkelem); /* register version */
|
|
break;
|
|
case 3:
|
|
x86emu_fpu_R_fstp(stkelem); /* register version */
|
|
break;
|
|
default:
|
|
x86emu_fpu_illegal();
|
|
break;
|
|
}
|
|
break;
|
|
default:
|
|
switch (rh)
|
|
{
|
|
case 0:
|
|
x86emu_fpu_M_fld(X86EMU_FPU_DOUBLE, destoffset);
|
|
break;
|
|
case 1:
|
|
x86emu_fpu_illegal();
|
|
break;
|
|
case 2:
|
|
x86emu_fpu_M_fst(X86EMU_FPU_DOUBLE, destoffset);
|
|
break;
|
|
case 3:
|
|
x86emu_fpu_M_fstp(X86EMU_FPU_DOUBLE, destoffset);
|
|
break;
|
|
case 4:
|
|
x86emu_fpu_M_frstor(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
case 5:
|
|
x86emu_fpu_illegal();
|
|
break;
|
|
case 6:
|
|
x86emu_fpu_M_fsave(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
case 7:
|
|
x86emu_fpu_M_fstsw(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
}
|
|
}
|
|
#endif
|
|
DECODE_CLEAR_SEGOVR();
|
|
END_OF_INSTR_NO_TRACE();
|
|
}
|
|
|
|
#ifdef DBG_X86EMU
|
|
|
|
static char *x86emu_fpu_op_de_tab[] =
|
|
{
|
|
"FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",
|
|
"FICOMP\tWORD PTR ",
|
|
"FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",
|
|
"FIDIVR\tWORD PTR ",
|
|
|
|
"FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",
|
|
"FICOMP\tWORD PTR ",
|
|
"FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",
|
|
"FIDIVR\tWORD PTR ",
|
|
|
|
"FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",
|
|
"FICOMP\tWORD PTR ",
|
|
"FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",
|
|
"FIDIVR\tWORD PTR ",
|
|
|
|
"FADDP\t", "FMULP\t", "FCOMP\t", "FCOMPP\t",
|
|
"FSUBRP\t", "FSUBP\t", "FDIVRP\t", "FDIVP\t",
|
|
};
|
|
|
|
#endif /* DBG_X86EMU */
|
|
|
|
/* opcode=0xde */
|
|
void x86emuOp_esc_coprocess_de(uint8_t X86EMU_UNUSED(op1))
|
|
{
|
|
int mod, rl, rh;
|
|
unsigned int destoffset;
|
|
uint8_t stkelem;
|
|
|
|
START_OF_INSTR();
|
|
FETCH_DECODE_MODRM(mod, rh, rl);
|
|
DECODE_PRINTINSTR32(x86emu_fpu_op_de_tab, mod, rh, rl);
|
|
switch (mod)
|
|
{
|
|
case 0:
|
|
destoffset = decode_rm00_address(rl);
|
|
DECODE_PRINTF("\r\n");
|
|
break;
|
|
case 1:
|
|
destoffset = decode_rm01_address(rl);
|
|
DECODE_PRINTF("\r\n");
|
|
break;
|
|
case 2:
|
|
destoffset = decode_rm10_address(rl);
|
|
DECODE_PRINTF("\r\n");
|
|
break;
|
|
case 3: /* register to register */
|
|
stkelem = (uint8_t)rl;
|
|
DECODE_PRINTF2("\tST(%d),ST\r\n", stkelem);
|
|
break;
|
|
}
|
|
#ifdef X86EMU_FPU_PRESENT
|
|
switch (mod)
|
|
{
|
|
case 3:
|
|
switch (rh)
|
|
{
|
|
case 0:
|
|
x86emu_fpu_R_faddp(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
case 1:
|
|
x86emu_fpu_R_fmulp(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
case 2:
|
|
x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
case 3:
|
|
if (stkelem == 1)
|
|
x86emu_fpu_R_fcompp(stkelem, X86EMU_FPU_STKTOP);
|
|
else
|
|
x86emu_fpu_illegal();
|
|
break;
|
|
case 4:
|
|
x86emu_fpu_R_fsubrp(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
case 5:
|
|
x86emu_fpu_R_fsubp(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
case 6:
|
|
x86emu_fpu_R_fdivrp(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
case 7:
|
|
x86emu_fpu_R_fdivp(stkelem, X86EMU_FPU_STKTOP);
|
|
break;
|
|
}
|
|
break;
|
|
default:
|
|
switch (rh)
|
|
{
|
|
case 0:
|
|
x86emu_fpu_M_fiadd(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
case 1:
|
|
x86emu_fpu_M_fimul(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
case 2:
|
|
x86emu_fpu_M_ficom(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
case 3:
|
|
x86emu_fpu_M_ficomp(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
case 4:
|
|
x86emu_fpu_M_fisub(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
case 5:
|
|
x86emu_fpu_M_fisubr(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
case 6:
|
|
x86emu_fpu_M_fidiv(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
case 7:
|
|
x86emu_fpu_M_fidivr(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
}
|
|
}
|
|
#endif
|
|
DECODE_CLEAR_SEGOVR();
|
|
END_OF_INSTR_NO_TRACE();
|
|
}
|
|
|
|
#ifdef DBG_X86EMU
|
|
|
|
static char *x86emu_fpu_op_df_tab[] =
|
|
{
|
|
/* mod == 00 */
|
|
"FILD\tWORD PTR ", "ESC_DF\t39\n", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",
|
|
"FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",
|
|
"FISTP\tQWORD PTR ",
|
|
|
|
/* mod == 01 */
|
|
"FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",
|
|
"FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",
|
|
"FISTP\tQWORD PTR ",
|
|
|
|
/* mod == 10 */
|
|
"FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",
|
|
"FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",
|
|
"FISTP\tQWORD PTR ",
|
|
|
|
/* mod == 11 */
|
|
"FFREE\t", "FXCH\t", "FST\t", "FSTP\t",
|
|
"ESC_DF\t3C,", "ESC_DF\t3D,", "ESC_DF\t3E,", "ESC_DF\t3F,"
|
|
};
|
|
|
|
#endif /* DBG_X86EMU */
|
|
|
|
/* opcode=0xdf */
|
|
void x86emuOp_esc_coprocess_df(uint8_t X86EMU_UNUSED(op1))
|
|
{
|
|
int mod, rl, rh;
|
|
unsigned int destoffset;
|
|
uint8_t stkelem;
|
|
|
|
START_OF_INSTR();
|
|
FETCH_DECODE_MODRM(mod, rh, rl);
|
|
DECODE_PRINTINSTR32(x86emu_fpu_op_df_tab, mod, rh, rl);
|
|
switch (mod)
|
|
{
|
|
case 0:
|
|
destoffset = decode_rm00_address(rl);
|
|
DECODE_PRINTF("\r\n");
|
|
break;
|
|
case 1:
|
|
destoffset = decode_rm01_address(rl);
|
|
DECODE_PRINTF("\r\n");
|
|
break;
|
|
case 2:
|
|
destoffset = decode_rm10_address(rl);
|
|
DECODE_PRINTF("\r\n");
|
|
break;
|
|
case 3: /* register to register */
|
|
stkelem = (uint8_t)rl;
|
|
DECODE_PRINTF2("\tST(%d)\r\n", stkelem);
|
|
break;
|
|
}
|
|
#ifdef X86EMU_FPU_PRESENT
|
|
switch (mod)
|
|
{
|
|
case 3:
|
|
switch (rh)
|
|
{
|
|
case 0:
|
|
x86emu_fpu_R_ffree(stkelem);
|
|
break;
|
|
case 1:
|
|
x86emu_fpu_R_fxch(stkelem);
|
|
break;
|
|
case 2:
|
|
x86emu_fpu_R_fst(stkelem); /* register version */
|
|
break;
|
|
case 3:
|
|
x86emu_fpu_R_fstp(stkelem); /* register version */
|
|
break;
|
|
default:
|
|
x86emu_fpu_illegal();
|
|
break;
|
|
}
|
|
break;
|
|
default:
|
|
switch (rh)
|
|
{
|
|
case 0:
|
|
x86emu_fpu_M_fild(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
case 1:
|
|
x86emu_fpu_illegal();
|
|
break;
|
|
case 2:
|
|
x86emu_fpu_M_fist(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
case 3:
|
|
x86emu_fpu_M_fistp(X86EMU_FPU_WORD, destoffset);
|
|
break;
|
|
case 4:
|
|
x86emu_fpu_M_fbld(X86EMU_FPU_BSD, destoffset);
|
|
break;
|
|
case 5:
|
|
x86emu_fpu_M_fild(X86EMU_FPU_LONG, destoffset);
|
|
break;
|
|
case 6:
|
|
x86emu_fpu_M_fbstp(X86EMU_FPU_BSD, destoffset);
|
|
break;
|
|
case 7:
|
|
x86emu_fpu_M_fistp(X86EMU_FPU_LONG, destoffset);
|
|
break;
|
|
}
|
|
}
|
|
#endif
|
|
DECODE_CLEAR_SEGOVR();
|
|
END_OF_INSTR_NO_TRACE();
|
|
}
|