54 lines
1.4 KiB
C
54 lines
1.4 KiB
C
#ifndef _PCI_BIOS_H_
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#define _PCI_BIOS_H_
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enum
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{
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PCI_BIOS_PRESENT = 0xB101,
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FIND_PCI_DEVICE = 0xB102,
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FIND_PCI_CLASS_CODE = 0xB103,
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GENERATE_SPECIAL_CYCLE = 0xB106,
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READ_CONFIG_BYTE = 0xB108,
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READ_CONFIG_WORD = 0xB109,
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READ_CONFIG_DWORD = 0xB10A,
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WRITE_CONFIG_BYTE = 0xB10B,
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WRITE_CONFIG_WORD = 0xB10C,
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WRITE_CONFIG_DWORD = 0xB10D,
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GET_IRQ_ROUTING_OPTIONS = 0xB10E,
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SET_PCI_IRQ = 0xB10F
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};
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enum
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{
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SUCCESSFUL = 0x00,
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FUNC_NOT_SUPPORTED = 0x81,
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BAD_VENDOR_ID = 0x83,
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DEVICE_NOT_FOUND = 0x86,
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BAD_REGISTER_NUMBER = 0x87,
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SET_FAILED = 0x88,
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BUFFER_TOO_SMALL = 0x89
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};
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extern int x86_pcibios_handler(struct X86EMU *emu);
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#define USE_SDRAM
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#define DIRECT_ACCESS
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#define MEM_WB(where, what) emu->emu_wrb(emu, where, what)
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#define MEM_WW(where, what) emu->emu_wrw(emu, where, what)
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#define MEM_WL(where, what) emu->emu_wrl(emu, where, what)
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#define MEM_RB(where) emu->emu_rdb(emu, where)
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#define MEM_RW(where) emu->emu_rdw(emu, where)
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#define MEM_RL(where) emu->emu_rdl(emu, where)
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#define PCI_VGA_RAM_IMAGE_START 0xC0000
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#define PCI_RAM_IMAGE_START 0xD0000
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#define SYS_BIOS 0xF0000
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#define SIZE_EMU 0x100000
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#define BIOS_MEM 0x100000UL
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#endif /* _PCI_BIOS_H_ */
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