networking works (sort of). For some reason, the Firebee packets don't cross my switch (or only very few of them do). If I put a Linux box in between (cross cable), using it as router, everything works flawlessly.

This commit is contained in:
Markus Fröschle
2014-01-06 18:44:36 +00:00
parent 3f3787872d
commit e365f91254
21 changed files with 447 additions and 411 deletions

View File

@@ -49,7 +49,7 @@
#include "interrupts.h"
#include "exceptions.h"
#define BAS_DEBUG
//#define BAS_DEBUG
#if defined(BAS_DEBUG)
#define dbg(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg); } while (0)
#else
@@ -251,7 +251,7 @@ static ARP_INFO arp_info;
void network_init(void)
{
uint8_t mac[6] = {0x00, 0x04, 0x9f, 0x01, 0x01, 0x01}; /* this is a Freescale MAC address */
uint8_t mac[6] = {0x00, 0xcf, 0x54, 0x12, 0x34, 0x56};
uint8_t bc[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; /* this is our broadcast MAC address */
IP_ADDR myip = {192, 168, 1, 100};
IP_ADDR gateway = {192, 168, 1, 1};

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@@ -24,9 +24,9 @@
#include "m5484l.h"
#endif
#define DRIVER_MEM_DEBUG
//#define DBG_DM
#ifdef DRIVER_MEM_DEBUG
#ifdef DBG_DM
#define dbg(fmt, args...) xprintf(fmt, ##args)
#else
#define dbg(fmt, args...)

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@@ -332,7 +332,7 @@ std_exc_vec:
move.w 8(sp),d0 // fetch vector
and.l #0x3fc,d0 // mask out vector number
#ifdef DBG_EXC
// printout vector number of exception
lea -4 * 4(sp),sp // reserve stack space
@@ -356,7 +356,8 @@ noprint:
movem.l (sp),d0-d1/a0-a1 // restore registers
lea 4 * 4(sp),sp
#endif /* DBG_EXC */
add.l _rt_vbr,d0 // + VBR
move.l d0,a5
move.l (a5),d0 // fetch exception routine address

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@@ -85,19 +85,11 @@ void test_byte(void)
void init_fpga(void)
{
uint8_t *fpga_data;
volatile int32_t time, start, end;
int i;
/*
xprintf("MCF_FBCS0_CSAR: %08x\r\n", MCF_FBCS0_CSAR);
xprintf("MCF_FBCS0_CSCR: %08x\r\n", MCF_FBCS0_CSCR);
xprintf("MCF_FBCS0_CSMR: %08x\r\n", MCF_FBCS0_CSMR);
*/
xprintf("FPGA load config... ");
//test_longword();
//test_word();
//test_byte();
start = MCF_SLT0_SCNT;
MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK; /* FPGA clock => low */
@@ -157,13 +149,18 @@ void init_fpga(void)
if (fpga_data < fpga_flash_data_end)
{
#ifdef _NOT_USED_
while (fpga_data++ < fpga_flash_data_end)
{
/* toggle a little more since it's fun ;) */
MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
}
xprintf("finished\r\n");
#endif /* _NOT_USED_ */
end = MCF_SLT0_SCNT;
time = (start - end) / (SYSCLK / 1000) / 1000;
xprintf("finished (took %f seconds).\r\n", time / 1000.0);
}
else
{

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@@ -211,7 +211,8 @@ bool isr_execute_handler(int vector)
(isrtab[index].type == ISR_DBUG_ISR))
{
retval = true;
if (isrtab[index].handler(isrtab[index].hdev,isrtab[index].harg))
if (isrtab[index].handler(isrtab[index].hdev, isrtab[index].harg))
{
return retval;
}

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@@ -60,11 +60,11 @@
#error "unknown machine!"
#endif /* MACHINE_FIREBEE */
#define DEBUG_MMU
//#define DEBUG_MMU
#ifdef DEBUG_MMU
#define dbg_mmu(format, arg...) do { xprintf("DEBUG: " format, ##arg);} while(0)
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg);} while(0)
#else
#define dbg_mmu(format, arg...) do {;} while (0)
#define dbg(format, arg...) do {;} while (0)
#endif /* DEBUG_MMU */
/*
@@ -385,7 +385,7 @@ void mmu_init(void)
MCF_MMU_MMUDR_SP | /* supervisor protect */
MCF_MMU_MMUDR_R | /* read access enable */
MCF_MMU_MMUDR_W | /* write access enable */
MCF_MMU_MMUDR_X | /* execute access enable */
//MCF_MMU_MMUDR_X | /* execute access enable */
MCF_MMU_MMUDR_LK; /* lock entry */
MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */
MCF_MMU_MMUOR_UAA; /* update allocation address field */
@@ -396,7 +396,7 @@ void mmu_init(void)
void mmutr_miss(uint32_t address)
{
dbg_mmu("MMU TLB MISS at 0x%08x\r\n", address);
dbg("MMU TLB MISS at 0x%08x\r\n", address);
flush_and_invalidate_caches();
switch (address)
@@ -404,13 +404,13 @@ void mmutr_miss(uint32_t address)
case keyctl:
case keybd:
/* do something to emulate the IKBD access */
dbg_mmu("IKBD access\r\n");
dbg("IKBD access\r\n");
break;
case midictl:
case midi:
/* do something to emulate MIDI access */
dbg_mmu("MIDI ACIA access\r\n");
dbg("MIDI ACIA access\r\n");
break;
default:

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@@ -284,7 +284,7 @@ void init_serial(void)
/********************************************************************/
/* Initialize DDR DIMMs on the EVB board */
/********************************************************************/
void init_ddram(void)
bool init_ddram(void)
{
xprintf("SDRAM controller initialization: ");
@@ -396,11 +396,14 @@ void init_ddram(void)
#endif /* MACHINE_FIREBEE */
xprintf("finished\r\n");
return true;
}
else
{
xprintf("skipped. Already initialized (running from RAM)\r\n");
}
return false;
}
/*
@@ -936,6 +939,8 @@ void clear_bss_segment(void)
void initialize_hardware(void)
{
bool coldboot = true;
/* Test for FireTOS switch: DIP switch #5 up */
#ifdef MACHINE_FIREBEE
if (!(DIP_SWITCH & (1 << 6))) {
@@ -960,7 +965,7 @@ void initialize_hardware(void)
/* Jump into FireTOS */
typedef void void_func(void);
void_func* FireTOS = (void_func*)FIRETOS;
void_func* FireTOS = (void_func*) FIRETOS;
FireTOS(); // Should never return
return;
}
@@ -1051,7 +1056,7 @@ void initialize_hardware(void)
init_slt();
init_fbcs();
init_ddram();
coldboot = init_ddram();
/*
* install (preliminary) exception vectors
@@ -1096,11 +1101,15 @@ void initialize_hardware(void)
}
#if MACHINE_FIREBEE
if (coldboot) /* does not work with BDM */
;
init_fpga();
init_pll();
init_video_ddr();
dvi_on();
#ifdef _NOT_USED_
/* experimental */
{
int i;
@@ -1120,6 +1129,7 @@ void initialize_hardware(void)
}
}
}
#endif /* _NOT_USED_ */
#endif /* MACHINE_FIREBEE */
driver_mem_init();