networking works (sort of). For some reason, the Firebee packets don't cross my switch (or only very few of them do). If I put a Linux box in between (cross cable), using it as router, everything works flawlessly.
This commit is contained in:
@@ -49,7 +49,7 @@
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#include "interrupts.h"
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#include "exceptions.h"
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#define BAS_DEBUG
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//#define BAS_DEBUG
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#if defined(BAS_DEBUG)
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#define dbg(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg); } while (0)
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#else
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@@ -251,7 +251,7 @@ static ARP_INFO arp_info;
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void network_init(void)
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{
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uint8_t mac[6] = {0x00, 0x04, 0x9f, 0x01, 0x01, 0x01}; /* this is a Freescale MAC address */
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uint8_t mac[6] = {0x00, 0xcf, 0x54, 0x12, 0x34, 0x56};
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uint8_t bc[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; /* this is our broadcast MAC address */
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IP_ADDR myip = {192, 168, 1, 100};
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IP_ADDR gateway = {192, 168, 1, 1};
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@@ -24,9 +24,9 @@
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#include "m5484l.h"
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#endif
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#define DRIVER_MEM_DEBUG
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//#define DBG_DM
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#ifdef DRIVER_MEM_DEBUG
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#ifdef DBG_DM
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#define dbg(fmt, args...) xprintf(fmt, ##args)
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#else
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#define dbg(fmt, args...)
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@@ -332,7 +332,7 @@ std_exc_vec:
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move.w 8(sp),d0 // fetch vector
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and.l #0x3fc,d0 // mask out vector number
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#ifdef DBG_EXC
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// printout vector number of exception
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lea -4 * 4(sp),sp // reserve stack space
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@@ -356,7 +356,8 @@ noprint:
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movem.l (sp),d0-d1/a0-a1 // restore registers
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lea 4 * 4(sp),sp
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#endif /* DBG_EXC */
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add.l _rt_vbr,d0 // + VBR
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move.l d0,a5
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move.l (a5),d0 // fetch exception routine address
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@@ -85,19 +85,11 @@ void test_byte(void)
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void init_fpga(void)
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{
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uint8_t *fpga_data;
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volatile int32_t time, start, end;
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int i;
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/*
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xprintf("MCF_FBCS0_CSAR: %08x\r\n", MCF_FBCS0_CSAR);
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xprintf("MCF_FBCS0_CSCR: %08x\r\n", MCF_FBCS0_CSCR);
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xprintf("MCF_FBCS0_CSMR: %08x\r\n", MCF_FBCS0_CSMR);
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*/
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xprintf("FPGA load config... ");
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//test_longword();
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//test_word();
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//test_byte();
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start = MCF_SLT0_SCNT;
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MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK; /* FPGA clock => low */
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@@ -157,13 +149,18 @@ void init_fpga(void)
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if (fpga_data < fpga_flash_data_end)
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{
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#ifdef _NOT_USED_
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while (fpga_data++ < fpga_flash_data_end)
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{
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/* toggle a little more since it's fun ;) */
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MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
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MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
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}
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xprintf("finished\r\n");
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#endif /* _NOT_USED_ */
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end = MCF_SLT0_SCNT;
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time = (start - end) / (SYSCLK / 1000) / 1000;
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xprintf("finished (took %f seconds).\r\n", time / 1000.0);
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}
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else
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{
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@@ -211,7 +211,8 @@ bool isr_execute_handler(int vector)
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(isrtab[index].type == ISR_DBUG_ISR))
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{
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retval = true;
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if (isrtab[index].handler(isrtab[index].hdev,isrtab[index].harg))
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if (isrtab[index].handler(isrtab[index].hdev, isrtab[index].harg))
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{
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return retval;
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}
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14
sys/mmu.c
14
sys/mmu.c
@@ -60,11 +60,11 @@
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#error "unknown machine!"
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#endif /* MACHINE_FIREBEE */
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#define DEBUG_MMU
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//#define DEBUG_MMU
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#ifdef DEBUG_MMU
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#define dbg_mmu(format, arg...) do { xprintf("DEBUG: " format, ##arg);} while(0)
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#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg);} while(0)
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#else
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#define dbg_mmu(format, arg...) do {;} while (0)
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#define dbg(format, arg...) do {;} while (0)
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#endif /* DEBUG_MMU */
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/*
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@@ -385,7 +385,7 @@ void mmu_init(void)
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MCF_MMU_MMUDR_SP | /* supervisor protect */
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MCF_MMU_MMUDR_R | /* read access enable */
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MCF_MMU_MMUDR_W | /* write access enable */
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MCF_MMU_MMUDR_X | /* execute access enable */
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//MCF_MMU_MMUDR_X | /* execute access enable */
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MCF_MMU_MMUDR_LK; /* lock entry */
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MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */
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MCF_MMU_MMUOR_UAA; /* update allocation address field */
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@@ -396,7 +396,7 @@ void mmu_init(void)
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void mmutr_miss(uint32_t address)
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{
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dbg_mmu("MMU TLB MISS at 0x%08x\r\n", address);
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dbg("MMU TLB MISS at 0x%08x\r\n", address);
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flush_and_invalidate_caches();
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switch (address)
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@@ -404,13 +404,13 @@ void mmutr_miss(uint32_t address)
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case keyctl:
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case keybd:
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/* do something to emulate the IKBD access */
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dbg_mmu("IKBD access\r\n");
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dbg("IKBD access\r\n");
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break;
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case midictl:
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case midi:
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/* do something to emulate MIDI access */
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dbg_mmu("MIDI ACIA access\r\n");
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dbg("MIDI ACIA access\r\n");
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break;
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default:
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@@ -284,7 +284,7 @@ void init_serial(void)
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/********************************************************************/
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/* Initialize DDR DIMMs on the EVB board */
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/********************************************************************/
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void init_ddram(void)
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bool init_ddram(void)
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{
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xprintf("SDRAM controller initialization: ");
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@@ -396,11 +396,14 @@ void init_ddram(void)
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#endif /* MACHINE_FIREBEE */
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xprintf("finished\r\n");
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return true;
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}
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else
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{
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xprintf("skipped. Already initialized (running from RAM)\r\n");
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}
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return false;
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}
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/*
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@@ -936,6 +939,8 @@ void clear_bss_segment(void)
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void initialize_hardware(void)
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{
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bool coldboot = true;
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/* Test for FireTOS switch: DIP switch #5 up */
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#ifdef MACHINE_FIREBEE
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if (!(DIP_SWITCH & (1 << 6))) {
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@@ -960,7 +965,7 @@ void initialize_hardware(void)
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/* Jump into FireTOS */
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typedef void void_func(void);
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void_func* FireTOS = (void_func*)FIRETOS;
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void_func* FireTOS = (void_func*) FIRETOS;
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FireTOS(); // Should never return
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return;
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}
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@@ -1051,7 +1056,7 @@ void initialize_hardware(void)
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init_slt();
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init_fbcs();
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init_ddram();
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coldboot = init_ddram();
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/*
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* install (preliminary) exception vectors
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@@ -1096,11 +1101,15 @@ void initialize_hardware(void)
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}
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#if MACHINE_FIREBEE
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if (coldboot) /* does not work with BDM */
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;
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init_fpga();
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init_pll();
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init_video_ddr();
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dvi_on();
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#ifdef _NOT_USED_
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/* experimental */
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{
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int i;
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@@ -1120,6 +1129,7 @@ void initialize_hardware(void)
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}
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}
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}
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#endif /* _NOT_USED_ */
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#endif /* MACHINE_FIREBEE */
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driver_mem_init();
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