From e1871d64d42f1935bd7f9872118cb1dd058f5993 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?David=20G=C3=A1lvez?= <dgalvez75@gmail.com>
Date: Tue, 20 Nov 2018 17:55:46 +0100
Subject: [PATCH] Show FPGA date after config loading

FPGA have now a register(0xf0040100) where the date is stored
---
 sys/init_fpga.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/sys/init_fpga.c b/sys/init_fpga.c
index ec96545..2a79618 100644
--- a/sys/init_fpga.c
+++ b/sys/init_fpga.c
@@ -45,6 +45,8 @@ extern uint8_t _FPGA_CONFIG[];
 extern uint8_t _FPGA_CONFIG_SIZE[];
 #define FPGA_FLASH_DATA_SIZE    ((uint32_t) &_FPGA_CONFIG_SIZE[0])
 
+#define ACP_FPGA_DATE_REG       *(volatile uint32_t *)(0xF0040100)
+
 /*
  * flag located in processor SRAM1 that indicates that the FPGA configuration has
  * been loaded through the onboard JTAG interface.
@@ -85,6 +87,16 @@ void config_gpio_for_jtag_config(void)
      */
 }
 
+void show_fpga_date(void)
+{
+   uint32_t date = ACP_FPGA_DATE_REG;
+   uint8_t day = (uint8_t)(date >> 24 & 0xffL);
+   uint8_t month = (uint8_t)(date >> 16 & 0xffL);
+   uint16_t year = (uint16_t)(date & 0xffffL);
+
+   xprintf("FPGA date: %02x/%02x/%04x (dd/mm/yyyy) \r\n", day, month, year);
+}
+
 /*
  * load FPGA
  */
@@ -105,6 +117,8 @@ bool init_fpga(void)
         // _FPGA_JTAG_LOADED = 0;
         // _FPGA_JTAG_VALID = 0;
 
+        show_fpga_date();
+
         return true;
     }
     start = MCF_SLT0_SCNT;
@@ -192,6 +206,8 @@ bool init_fpga(void)
 
         xprintf("SRAM now set to FPGA load skip\r\n");
 
+        show_fpga_date();
+
         return true;
     }
     xprintf("FAILED!\r\n");