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radeonfb tests (debug output activated)

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This commit is contained in:
Markus Fröschle
2016-10-28 05:21:24 +00:00
parent 6906e89beb
commit d499d7d1f0
8 changed files with 93 additions and 70 deletions
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3
BaS_gcc/pci/pci.c
View File

@@ -1120,13 +1120,14 @@ void init_xlbus_arbiter(void)
* M2 = Multichannel DMA
* M3 = PCI target interface
*/
#if 0
MCF_XLB_XARB_PRIEN = MCF_XLB_XARB_PRIEN_M0 | /* activate programmed priority for Coldfire core */
MCF_XLB_XARB_PRIEN_M2 | /* activate programmed priority for Multichannel DMA */
MCF_XLB_XARB_PRIEN_M3; /* activate programmed priority for PCI target interface */
MCF_XLB_XARB_PRI = MCF_XLB_XARB_PRI_M0P(7) | /* Coldfire core gets lowest */
MCF_XLB_XARB_PRI_M2P(5) | /* Multichannel DMA mid priority */
MCF_XLB_XARB_PRI_M3P(3); /* PCI target interface is highest priority */
#endif
}
void init_pci(void)

46
BaS_gcc/radeon/radeon_base.c
View File

@@ -62,7 +62,7 @@
#include "bas_string.h"
#include "exceptions.h" /* for set_ipl() */
// #define DEBUG
#define DEBUG
#include "debug.h"
extern void run_bios(struct radeonfb_info *rinfo);
@@ -918,13 +918,23 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
int radeonfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
{
struct radeonfb_info *rinfo = info->par;
// DPRINT("radeonfb: radeonfb_pan_display\r\n");
dbg("\r\n");
if ((var->xoffset + var->xres) > var->xres_virtual)
{
dbg("xoffset = %d, xres = %d, xres_virtual=%d\r\n",
var->xoffset, var->xres, var->xres_virtual);
return -1; //-EINVAL;
}
if (((var->yoffset * var->xres_virtual) + var->xoffset) >=
(rinfo->mapped_vram - (var->yres * var->xres * (var->bits_per_pixel / 8))))
{
dbg("yoffset=%d, xres_virtual=%d, mapped_vram=%ld,\r\n",
"yres=%d, xres=%d, bpp=%d\r\n",
var->yoffset, var->xres_virtual, var->xoffset, rinfo->mapped_vram,
var->yres, var->xres, var->bits_per_pixel);
return -1; //-EINVAL;
}
if (rinfo->asleep)
return 0;
@@ -2126,25 +2136,25 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo)
*/
switch(rinfo->family)
{
case CHIP_FAMILY_LEGACY: dbg("chip type: %s\r\n", "LEGACY"); break;
case CHIP_FAMILY_RADEON: dbg("chip type: %s\r\n", "RADEON"); break;
case CHIP_FAMILY_RV100: dbg("chip type: %s\r\n", "RV100"); break;
case CHIP_FAMILY_RS100: dbg("chip type: %s\r\n", "RS100"); break;
case CHIP_FAMILY_RV200: dbg("chip type: %s\r\n", "RV200"); break;
case CHIP_FAMILY_RS200: dbg("chip type: %s\r\n", "RS200"); break;
case CHIP_FAMILY_R200: dbg("chip type: %s\r\n", "R200"); break;
case CHIP_FAMILY_RV250: dbg("chip type: %s\r\n", "RV250"); break;
case CHIP_FAMILY_RS300: dbg("chip type: %s\r\n", "RS300"); break;
case CHIP_FAMILY_RV280: dbg("chip type: %s\r\n", "RV280"); break;
case CHIP_FAMILY_R300: dbg("chip type: %s\r\n", "R300"); break;
case CHIP_FAMILY_R350: dbg("chip type: %s\r\n", "R350"); break;
case CHIP_FAMILY_RV350: dbg("chip type: %s\r\n", "RV350"); break;
case CHIP_FAMILY_RV380: dbg("chip type: %s\r\n", "RV380"); break;
case CHIP_FAMILY_LEGACY: inf("chip type: %s\r\n", "LEGACY"); break;
case CHIP_FAMILY_RADEON: inf("chip type: %s\r\n", "RADEON"); break;
case CHIP_FAMILY_RV100: inf("chip type: %s\r\n", "RV100"); break;
case CHIP_FAMILY_RS100: inf("chip type: %s\r\n", "RS100"); break;
case CHIP_FAMILY_RV200: inf("chip type: %s\r\n", "RV200"); break;
case CHIP_FAMILY_RS200: inf("chip type: %s\r\n", "RS200"); break;
case CHIP_FAMILY_R200: inf("chip type: %s\r\n", "R200"); break;
case CHIP_FAMILY_RV250: inf("chip type: %s\r\n", "RV250"); break;
case CHIP_FAMILY_RS300: inf("chip type: %s\r\n", "RS300"); break;
case CHIP_FAMILY_RV280: inf("chip type: %s\r\n", "RV280"); break;
case CHIP_FAMILY_R300: inf("chip type: %s\r\n", "R300"); break;
case CHIP_FAMILY_R350: inf("chip type: %s\r\n", "R350"); break;
case CHIP_FAMILY_RV350: inf("chip type: %s\r\n", "RV350"); break;
case CHIP_FAMILY_RV380: inf("chip type: %s\r\n", "RV380"); break;
case CHIP_FAMILY_R420: dbg("chip type: %s\r\n", "R420"); break;
default: dbg("chip type: %s\r\n", "UNKNOW"); break;
default: inf("chip type: %s\r\n", "UNKNOW"); break;
}
inf("found %d KB of %d bits wide %s video RAM\r\n", rinfo->video_ram / 1024,
rinfo->vram_width, rinfo->vram_ddr ? "DDR " : "SDRAM ");
rinfo->vram_width, rinfo->vram_ddr ? "DDR" : "SDRAM");
}
int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)

2
BaS_gcc/sys/BaS.c
View File

@@ -228,7 +228,7 @@ void enable_coldfire_interrupts()
MCF_GPT_GMS_IEN |
MCF_GPT_GMS_TMS(1); /* route GPT0 interrupt on interrupt controller */
MCF_INTC_ICR62 = MCF_INTC_ICR_IL(7) |
MCF_INTC_ICR_IP(6); /* interrupt level 7, interrupt priority 7 */
MCF_INTC_ICR_IP(6); /* interrupt level 7, interrupt priority 6 */
MCF_INTC_IMRH = 0xbffffffe; /* psc3 and timer 0 int on */
#endif
#endif

20
BaS_gcc/sys/interrupts.c
View File

@@ -441,26 +441,26 @@ bool xlbarb_interrupt_handler(void *arg1, void *arg2)
/*
* TODO: we should probably issue a bus error when this occors
*/
dbg("XLB arbiter interrupt. XARB_ADRCAP=0x%08lx\r\n", MCF_XLB_XARB_ADRCAP);
err("XLB arbiter interrupt. XARB_ADRCAP=0x%08lx\r\n", MCF_XLB_XARB_ADRCAP);
if (status & MCF_XLB_XARB_SR_AT)
dbg("address tenure timeout\r\n");
err("address tenure timeout\r\n");
if (status & MCF_XLB_XARB_SR_DT)
dbg("data tenure timeout\r\n");
err("data tenure timeout\r\n");
if (status & MCF_XLB_XARB_SR_BA)
dbg("bus activity tenure timeout\r\n");
err("bus activity tenure timeout\r\n");
if (status & MCF_XLB_XARB_SR_TTM)
dbg("TBST/TSIZ mismatch\r\n");
err("TBST/TSIZ mismatch\r\n");
if (status & MCF_XLB_XARB_SR_ECW)
dbg("external control word read/write\r\n");
err("external control word read/write\r\n");
if (status & MCF_XLB_XARB_SR_TTR)
dbg("TT reserved\r\n");
err("TT reserved\r\n");
if (status & MCF_XLB_XARB_SR_TTA)
dbg("TT address only\r\n");
err("TT address only\r\n");
if (status & MCF_XLB_XARB_SR_MM)
dbg("multiple masters at priority 0\r\n");
err("multiple masters at priority 0\r\n");
if (status & MCF_XLB_XARB_SR_SEA)
dbg("slave error acknowledge\r\n");
err("slave error acknowledge\r\n");
/*
* acknowledge interrupt

16
BaS_gcc/video/fbmem.c
View File

@@ -19,7 +19,7 @@
#include "driver_mem.h"
#include "bas_string.h"
// #define DEBUG
#define DEBUG
#include "debug.h"
@@ -37,9 +37,18 @@ int fb_pan_display(struct fb_info *info, struct fb_var_screeninfo *var)
dbg("\r\n");
if ((xoffset < 0) || (yoffset < 0)
|| ((xoffset + info->var.xres) > info->var.xres_virtual))
{
dbg("xoffset=%d, yoffset=%d, xres=%d, xres_virtual = %d\r\n",
xoffset, yoffset, info->var.xres, info->var.xres_virtual);
return -1; //-EINVAL;
}
if ((err = info->fbops->fb_pan_display(var, info)))
{
dbg("fb_pan_display returned %d\r\n", err);
return err;
}
info->var.xoffset = var->xoffset;
info->var.yoffset = var->yoffset;
if (var->vmode & FB_VMODE_YWRAP)
@@ -53,11 +62,11 @@ int fb_set_var(struct fb_info *info, struct fb_var_screeninfo *var)
{
int err;
dbg("\r\n");
dbg("var->activate = 0x%x\r\n", var->activate);
if (var->activate & FB_ACTIVATE_INV_MODE)
{
/* return 1 if equal */
dbg("invalid mode\r\n");
return !memcmp((char *) &info->var, (char *) var, sizeof(struct fb_var_screeninfo));
}
@@ -66,6 +75,7 @@ int fb_set_var(struct fb_info *info, struct fb_var_screeninfo *var)
{
if ((err = info->fbops->fb_check_var(var, info)))
{
dbg("fb_check_var failed\r\n");
return err;
}

2
BaS_gcc/video/fbmodedb.c
View File

@@ -16,7 +16,7 @@
#include "bas_printf.h"
#include "bas_string.h"
// #define DEBUG
#define DEBUG
#include "debug.h"
#define name_matches(v, s, l) \

34
BaS_gcc/video/video.c
View File

@@ -7,7 +7,7 @@
#include "fb.h"
#include "radeonfb.h"
// #define DEBUG
#define DEBUG
#include "debug.h"
#ifdef _USE_VIDEL_
@@ -274,15 +274,12 @@ void videl_screen_init(void)
static struct radeonfb_info rfb;
static struct fb_info fb =
static struct fb_var_screeninfo default_fb =
{
.par = &rfb,
.var =
{
.xres = 640,
.yres = 480,
.xres_virtual = 640,
.yres_virtual = 480,
.xres = 1280,
.yres = 1024,
.xres_virtual = 2560,
.yres_virtual = 2048,
.xoffset = 0,
.yoffset = 0,
.bits_per_pixel = 8,
@@ -293,10 +290,10 @@ static struct fb_info fb =
.transp = { 0, 0, 0 },
.nonstd = 0,
.activate = FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW,
.height = 480,
.width = 640,
.height = 1024,
.width = 1280,
.accel_flags = 0L,
.pixclock = 0,
.pixclock = 70 * 100000000L,
.left_margin = 0,
.right_margin = 0,
.upper_margin = 0,
@@ -307,7 +304,12 @@ static struct fb_info fb =
.vmode = FB_VMODE_CONUPDATE,
.rotate = 0,
.refresh = 60,
},
};
static struct fb_info fb =
{
.par = &rfb,
.fix =
{
"ATI Radeon",
@@ -334,8 +336,8 @@ int16_t ignore_edid;
struct mode_option resolution =
{
.used = 1,
.width = 640,
.height = 480,
.width = 1280,
.height = 1024,
.bpp = 8,
.freq = 60,
.flags = MODE_VESA_FLAG
@@ -397,7 +399,7 @@ void video_init(void)
if (radeonfb_pci_register(handle, board) >= 0)
{
fb_set_var(info_fb, &info_fb->var);
fb_set_var(info_fb, &default_fb);
inf("RADEON video card found and registered\r\n");
}
else

2
BaS_gcc/x86emu/x86biosemu.c
View File

@@ -10,7 +10,7 @@
#include "pci_ids.h"
#include "x86pcibios.h"
#define DEBUG
// #define DEBUG
#include "debug.h"
#define USE_SDRAM