diff --git a/BaS_gcc/bas.lk.in b/BaS_gcc/bas.lk.in
index fd829ab..40be566 100644
--- a/BaS_gcc/bas.lk.in
+++ b/BaS_gcc/bas.lk.in
@@ -1,7 +1,7 @@
 #if defined(MACHINE_FIREBEE)
 #include "firebee.h"
 #elif defined(MACHINE_M5484LITE)
-#include "m5484l.h"
+#    include "m5484l.h"
 #elif defined(MACHINE_M54455)
 #include "m54455.h"
 #else
diff --git a/BaS_gcc/flash_scripts/flash_firebee_bas.bdm b/BaS_gcc/flash_scripts/flash_firebee_bas.bdm
index 0cd530e..51c9b8a 100755
--- a/BaS_gcc/flash_scripts/flash_firebee_bas.bdm
+++ b/BaS_gcc/flash_scripts/flash_firebee_bas.bdm
@@ -11,7 +11,7 @@ wait
 # use system sdram as flashlib scratch area.
 # TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet.
 # This seems to be related to large flash buffers and PC-relative adressing of the plugin
-#flash-plugin 0x1000 0xf000 flash29-5475.plugin
+flash-plugin 0x1000 0xf000 flash29.plugin
 # notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
 flash 0xe0000000
 
diff --git a/BaS_gcc/sys/init_fpga.c b/BaS_gcc/sys/init_fpga.c
index 08c9438..ec96545 100644
--- a/BaS_gcc/sys/init_fpga.c
+++ b/BaS_gcc/sys/init_fpga.c
@@ -95,13 +95,15 @@ bool init_fpga(void)
     int i;
 
     xprintf("FPGA load config...\r\n");
+    xprintf("_FPGA_JTAG_LOADED = 0x%x\r\n", _FPGA_JTAG_LOADED);
+    xprintf("_FPGA_JTAG_VALID = 0x%x\r\n", _FPGA_JTAG_VALID);
     if (_FPGA_JTAG_LOADED == 1 && _FPGA_JTAG_VALID == VALID_JTAG)
     {
         xprintf("detected _FPGA_JTAG_LOADED flag. FPGA config skipped.\r\n");
 
         /* reset the flag so that next boot will load config again from flash */
-        _FPGA_JTAG_LOADED = 0;
-        _FPGA_JTAG_VALID = 0;
+        // _FPGA_JTAG_LOADED = 0;
+        // _FPGA_JTAG_VALID = 0;
 
         return true;
     }
@@ -180,6 +182,16 @@ bool init_fpga(void)
 
         xprintf("finished (took %f seconds).\r\n", time / 1000.0);
         config_gpio_for_jtag_config();
+
+        /*
+         * assure skipping fpga load on warm boot
+         */
+
+        _FPGA_JTAG_LOADED = 1;
+        _FPGA_JTAG_VALID = VALID_JTAG;
+
+        xprintf("SRAM now set to FPGA load skip\r\n");
+
         return true;
     }
     xprintf("FAILED!\r\n");
diff --git a/BaS_gcc/sys/startcf.S b/BaS_gcc/sys/startcf.S
index 6986135..ab3fe0d 100644
--- a/BaS_gcc/sys/startcf.S
+++ b/BaS_gcc/sys/startcf.S
@@ -41,6 +41,7 @@ _rom_entry:
 
 		clr.l	d0
 		move.l	d0,MCF_MMU_MMUCR
+        nop
 
 #if !defined(MACHINE_M54455)			// MCF54455 does not have RAMBAR0 and RAMBAR1 registers */