fixed a bug with LINK instruction not saving address register
This commit is contained in:
Markus Fröschle
3
.gdbinit
3
.gdbinit
@@ -1,7 +1,8 @@
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#set disassemble-next-line on
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define tr
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!killall m68k-bdm-gdbserver
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#!killall m68k-bdm-gdbserver
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target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
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#target remote localhost:1234
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#target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
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#target dbug /dev/ttyS0
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#monitor bdm-reset
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102
sys/exceptions.S
102
sys/exceptions.S
@@ -208,7 +208,7 @@
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/**********************************************************/
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.altmacro
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.macro irq vector,int_mask,clr_int
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move.w #0x2700,sr // disable interrupt
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//move.w #0x2700,sr // disable interrupt
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subq.l #8,a7
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movem.l d0/a5,(a7) // save registers
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@@ -237,18 +237,18 @@
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* If anybody knows of any better way on how to do this - please do!
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*
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*/
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.macro mchar st,a,b,c,d,tgt
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\st #\a << 24|\b<<16|\c<<8|\d,\tgt
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.endm
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.macro mchar st,a,b,c,d,tgt
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\st #\a << 24|\b<<16|\c<<8|\d,\tgt
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.endm
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.text
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_vec_init:
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move.l a2,-(sp) // Backup registers
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mov3q.l #-1,_rt_mod // rt_mod auf super
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clr.l _rt_ssp
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clr.l _rt_usp
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clr.l _rt_vbr
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clr.l _rt_ssp
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clr.l _rt_usp
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clr.l _rt_vbr
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move.l #__RAMBAR0,d0 // exception vectors reside in rambar0
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movec d0,VBR
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move.l d0,a0
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@@ -326,7 +326,7 @@ init_vec_loop:
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*/
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vector_table_start:
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std_exc_vec:
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move.w #0x2700,sr // disable interrupt
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//move.w #0x2700,sr // disable interrupt
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subq.l #8,a7
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movem.l d0/a5,(sp) // save registers
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move.w 8(sp),d0 // fetch vector
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@@ -365,9 +365,9 @@ noprint:
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move.l 4(sp),a5 // restore a5
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move.l d0,4(a7) // store exception routine address
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move.w 10(a7),d0 // restore original SR
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bset #13,d0 // set supervisor bit
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move.w d0,sr //
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//move.w 10(a7),d0 // restore original SR
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//bset #13,d0 // set supervisor bit
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//move.w d0,sr //
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move.l (a7)+,d0 // restore d0
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rts // jump to exception routine
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@@ -409,15 +409,15 @@ access_mmu:
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cmp.l #__FASTRAM_END,d0 // above max User RAM area?
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bge bus_error // -> bus error
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lea -5*4(sp),sp // save gcc scratch registers
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movem.l d0-d1/a0-a2,(sp)
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lea -3 * 4(sp),sp // save gcc scratch registers
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movem.l d1/a0-a1,(sp)
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move.l d0,-(sp) // fault address
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jsr _mmutr_miss // else we have an MMU TLB miss
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addq.l #4,sp
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movem.l (sp),d0-d1/a0-a2 // restore gcc scratch registers
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lea 5*4(sp),sp
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movem.l (sp),d1/a0-a1 // restore gcc scratch registers
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lea 3 * 4(sp),sp
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move.l (sp)+,d0 // restore register
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@@ -555,33 +555,33 @@ irq6: // MFP interrupt from FPGA
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// screen adr change timed out?
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move.l _video_sbt,d0
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beq irq6_non_sca // nothing to do if 0
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sub.l #0x70000000,d0 // substract 14 seconds
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sub.l #0x70000000,d0 // substract 14 seconds
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lea MCF_SLT0_SCNT,a5
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cmp.l (a5),d0 // time reached?
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ble irq6_non_sca // not yet
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lea -28(a7),a7 // save more registers
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movem.l d0-d4/a0-a1,(a7) //
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movem.l d0-d4/a0-a1,(a7) //
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clr.l d3 // beginn mit 0
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jsr _flush_and_invalidate_caches
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// eintrag suchen
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irq6_next_sca:
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move.l d3,d0
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move.l d3,d0
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move.l d0,MCF_MMU_MMUAR // addresse
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move.l #0x106,d4
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move.l d4,MCF_MMU_MMUOR // suchen ->
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nop
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move.l MCF_MMU_MMUOR,d4
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clr.w d4
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swap d4
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move.l d4,MCF_MMU_MMUAR
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move.l #0x106,d4
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move.l d4,MCF_MMU_MMUOR // suchen ->
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nop
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move.l MCF_MMU_MMUOR,d4
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clr.w d4
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swap d4
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move.l d4,MCF_MMU_MMUAR
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mvz.w #0x10e,d4
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move.l d4,MCF_MMU_MMUOR // einträge holen aus mmu
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nop
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move.l MCF_MMU_MMUTR,d4 // ID holen
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move.l d4,MCF_MMU_MMUOR // einträge holen aus mmu
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nop
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move.l MCF_MMU_MMUTR,d4 // ID holen
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lsr.l #2,d4 // bit 9 bis 2
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cmp.w #sca_page_ID,d4 // ist screen change ID?
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cmp.w #sca_page_ID,d4 // ist screen change ID?
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bne irq6_sca_pn // nein -> page keine screen area next
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// eintrag <EFBFBD>ndern
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add.l #std_mmutr,d0
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@@ -652,7 +652,7 @@ irq6_sca_pn:
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move.l d0,_video_tlb // anfangszustand wieder herstellen
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clr.l _video_sbt // zeit löschen
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movem.l (sp),d0-d4/a0-a1 // restore registers
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movem.l (sp),d0-d4/a0-a1 // restore registers
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lea 7 * 4(sp),sp
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irq6_non_sca:
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@@ -757,8 +757,8 @@ acsi_dma_rl:
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move.l (a5),(a1)+ // read 4 bytes
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move.l (a5),(a1)+ // read 4 bytes
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moveq #'.',d1
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move.b d1,MCF_PSC0_PSCTB_8BIT
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moveq #'.',d1
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move.b d1,MCF_PSC0_PSCTB_8BIT
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sub.l #16,d0 // byt counter -16
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bpl acsi_dma_rl
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@@ -771,8 +771,8 @@ acsi_dma_wl:
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move.l (a1)+,(a5) // write 4 byts
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move.l (a1)+,(a5) // write 4 byts
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moveq #'.',d1
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move.b d1,MCF_PSC0_PSCTB_8BIT
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moveq #'.',d1
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move.b d1,MCF_PSC0_PSCTB_8BIT
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sub.l #16,d0 // byt counter -16
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bpl acsi_dma_wl
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@@ -871,7 +871,7 @@ handler_gpt0:
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blt sca_other //
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lea MCF_SLT0_SCNT,a0
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move.l (a0),_video_sbt // save time
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move.l (a0),_video_sbt // save time
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// FIXME: don't we need to get out here?
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@@ -944,13 +944,13 @@ video_copy_data_loop:
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// eintrag suchen
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move.l d0,MCF_MMU_MMUAR // adress
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move.l #0x106,d4
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move.l d4,MCF_MMU_MMUOR // search -> new one will be offered if not found
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nop
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move.l MCF_MMU_MMUOR,d4
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clr.w d4
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swap d4
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move.l d4,MCF_MMU_MMUAR
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move.l #0x106,d4
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move.l d4,MCF_MMU_MMUOR // search -> new one will be offered if not found
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nop
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move.l MCF_MMU_MMUOR,d4
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clr.w d4
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swap d4
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move.l d4,MCF_MMU_MMUAR
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move.l d0,d1
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add.l #MCF_MMU_MMUTR_ID(sca_page_ID)|std_mmutr,d0
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add.l #0x60000000|writethrough_mmudr|MCF_MMU_MMUDR_LK,d1
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@@ -991,20 +991,22 @@ video_chg_end:
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* low-level interrupt service routine for routines registered with
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* isr_register_handler()
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*/
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.global _lowlevel_isr_handler
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.global _lowlevel_isr_handler
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.extern _isr_execute_handler
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_lowlevel_isr_handler:
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move.w #0x2700,sr // disable interrupts
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link a6,#-4*4 // make room for
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movem.l d0-d1/a0-a1,(sp) // gcc scratch registers and save them
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move.w #0x2700,sr
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lea -5 * 4(sp),sp // make room for
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movem.l d0-d1/a0-a2,(sp) // gcc scratch registers and save them,
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// other registers will be handled by gcc itself
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move.w 4(a6),d0 // fetch vector number from stack
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move.w 5 * 4(sp),d0 // fetch vector number from stack
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lsr.l #2,d0 // move it in place
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andi.l #0x000000ff,d0 // mask it out
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move.l d0,-(sp) // push it
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jsr _isr_execute_handler // call the C handler
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lea 4(sp),sp // adjust stack
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movem.l (sp),d0-d1/a0-a1 // restore registers
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unlk a6 // cleanup stack
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addq.l #4,sp // adjust stack
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movem.l (sp),d0-d1/a0-a2 // restore registers
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lea 5 * 4(sp),sp
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rte
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