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tried, but did not find the cause of access error during alignment of the TD buffers...

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This commit is contained in:
Markus Fröschle
2013-11-04 20:09:32 +00:00
parent d11cfe5ba0
commit d14bfd1cf2
8 changed files with 57 additions and 37 deletions
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2
sources/BaS.c
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@@ -230,12 +230,14 @@ void BaS(void)
nvram_init();
#endif /* MACHINE_FIREBEE */
#ifdef MACHINE_FIREBEE
xprintf("copy EmuTOS: ");
/* copy EMUTOS */
src = (uint8_t *) EMUTOS;
memcpy(dst, src, EMUTOS_SIZE);
xprintf("finished\r\n");
#endif /* MACHINE_FIREBEE */
xprintf("initialize MMU: ");
mmu_init();

22
sources/ohci-hcd.c
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@@ -1391,7 +1391,7 @@ static int submit_common_msg(ohci_t *ohci, struct usb_device *dev, uint32_t pipe
int stat = 0;
int maxsize = usb_maxpacket(dev, pipe);
int timeout;
urb_priv_t *urb = (urb_priv_t *)usb_malloc(sizeof(urb_priv_t));
urb_priv_t *urb = (urb_priv_t *) usb_malloc(sizeof(urb_priv_t));
if (urb == NULL)
{
err("submit_common_msg malloc failed");
@@ -1403,6 +1403,7 @@ static int submit_common_msg(ohci_t *ohci, struct usb_device *dev, uint32_t pipe
urb->transfer_buffer = buffer;
urb->transfer_buffer_length = transfer_len;
urb->interval = interval;
/* device pulled? Shortcut the action. */
if (ohci->devgone == dev)
{
@@ -1895,6 +1896,7 @@ static void hc_free_buffers(ohci_t *ohci)
/*-------------------------------------------------------------------------*/
td_t *ptd;
/*
* low level initalisation routine, called from usb.c
*/
@@ -1916,41 +1918,45 @@ int ohci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
info("ohci %p", ohci);
ohci->controller = (ohci->handle >> 16) & 3; /* PCI function */
/* this must be aligned to a 256 byte boundary */
ohci->hcca_unaligned = (struct ohci_hcca *)usb_malloc(sizeof(struct ohci_hcca) + 256);
ohci->hcca_unaligned = (struct ohci_hcca *) usb_malloc(sizeof(struct ohci_hcca) + 256);
if (ohci->hcca_unaligned == NULL)
{
err("HCCA malloc failed");
return(-1);
}
/* align the storage */
ohci->hcca = (struct ohci_hcca *)(((uint32_t)ohci->hcca_unaligned + 255) & ~255);
ohci->hcca = (struct ohci_hcca *) (((uint32_t)ohci->hcca_unaligned + 255) & ~255);
memset(ohci->hcca, 0, sizeof(struct ohci_hcca));
info("aligned ghcca %p", ohci->hcca);
ohci->ohci_dev_unaligned = (struct ohci_device *)usb_malloc(sizeof(struct ohci_device) + 8);
ohci->ohci_dev_unaligned = (struct ohci_device *) usb_malloc(sizeof(struct ohci_device) + 8);
if (ohci->ohci_dev_unaligned == NULL)
{
err("EDs malloc failed");
hc_free_buffers(ohci);
return(-1);
}
ohci->ohci_dev = (struct ohci_device *)(((uint32_t)ohci->ohci_dev_unaligned + 7) & ~7);
ohci->ohci_dev = (struct ohci_device *) (((uint32_t) ohci->ohci_dev_unaligned + 7) & ~7);
memset(ohci->ohci_dev, 0, sizeof(struct ohci_device));
info("aligned EDs %p", ohci->ohci_dev);
ohci->td_unaligned = (td_t *)usb_malloc(sizeof(td_t) * (NUM_TD + 1));
ohci->td_unaligned = (td_t *) usb_malloc(sizeof(td_t) * (NUM_TD + 1));
if (ohci->td_unaligned == NULL)
{
err("TDs malloc failed");
hc_free_buffers(ohci);
return(-1);
}
ptd = (td_t *)(((uint32_t)ohci->td_unaligned + 7) & ~7);
ptd = (td_t *) (((uint32_t) ohci->td_unaligned + 7) & ~7);
xprintf("memset from %p to %p\r\n", ptd, ptd + sizeof(td_t) * NUM_TD);
memset(ptd, 0, sizeof(td_t) * NUM_TD);
info("aligned TDs %p", ptd);
ohci->disabled = 1;
ohci->sleeping = 0;
ohci->irq = -1;
if ((long)pci_rsc_desc >= 0)
if ((long) pci_rsc_desc >= 0)
{
unsigned short flags;
do

33
sources/sysinit.c
View File

@@ -347,15 +347,15 @@ void init_fbcs()
xprintf("FlexBus chip select registers initialization: ");
/* Flash */
MCF_FBCS0_CSAR = BOOTFLASH_BASE_ADDRESS;/* flash base address */
MCF_FBCS0_CSCR = MCF_FBCS_CSCR_PS_16 | /* 16 bit word access */
MCF_FBCS_CSCR_WS(6)| /* 6 Waitstates */
MCF_FBCS_CSCR_AA; /* */
MCF_FBCS0_CSAR = BOOTFLASH_BASE_ADDRESS; /* flash base address */
MCF_FBCS0_CSCR = MCF_FBCS_CSCR_PS_16 | /* 16 bit word access */
MCF_FBCS_CSCR_WS(6)| /* 6 Waitstates */
MCF_FBCS_CSCR_AA; /* */
MCF_FBCS0_CSMR = BOOTFLASH_BAM |
MCF_FBCS_CSMR_V; /* 8 MByte on */
MCF_FBCS_CSMR_V; /* enable */
#ifdef MACHINE_FIREBEE /* FBC setup for FireBee */
#if MACHINE_FIREBEE /* FBC setup for FireBee */
MCF_FBCS1_CSAR = 0xFFF00000; /* ATARI I/O ADRESS */
MCF_FBCS1_CSCR = MCF_FBCS_CSCR_PS_16 /* 16BIT PORT */
| MCF_FBCS_CSCR_WS(8) /* DEFAULT 8WS */
@@ -381,6 +381,12 @@ void init_fbcs()
| MCF_FBCS_CSCR_BSTW; // BURST WRITE ENABLE
MCF_FBCS4_CSMR = MCF_FBCS_CSMR_BAM_1G // 4000'0000-7FFF'FFFF
| MCF_FBCS_CSMR_V;
#elif MACHINE_M5484LITE
/* disable other FBCS for now */
MCF_FBCS1_CSMR = 0;
MCF_FBCS2_CSMR = 0;
MCF_FBCS3_CSMR = 0;
MCF_FBCS4_CSMR = 0;
#endif /* MACHINE_FIREBEE */
@@ -837,7 +843,7 @@ extern uint8_t _BAS_RESIDENT_TEXT[];
extern uint8_t _BAS_RESIDENT_TEXT_SIZE[];
#define BAS_RESIDENT_TEXT_SIZE ((uint32_t) _BAS_RESIDENT_TEXT_SIZE)
void clear_datasegment(void)
void clear_data_segment(void)
{
extern uint8_t _BAS_DATA_START[];
uint8_t *BAS_DATA_START = &_BAS_DATA_START[0];
@@ -847,6 +853,16 @@ void clear_datasegment(void)
bzero(BAS_DATA_START, BAS_DATA_END - BAS_DATA_START);
}
void clear_bss_segment(void)
{
extern uint8_t _BAS_BSS_START[];
uint8_t * BAS_BSS_START = &_BAS_BSS_START[0];
extern uint8_t _BAS_BSS_END[];
uint8_t *BAS_BSS_END = &_BAS_BSS_END[0];
bzero(BAS_BSS_START, BAS_BSS_END - BAS_BSS_END);
}
void initialize_hardware(void)
{
/* Test for FireTOS switch: DIP switch #5 up */
@@ -881,8 +897,9 @@ void initialize_hardware(void)
if (BAS_LMA != BAS_IN_RAM)
{
clear_datasegment();
clear_data_segment();
}
clear_bss_segment();
init_gpio();
init_serial();