Firebee/BaS_gcc
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

changed types to use <stdint.h>

Browse Source
This commit is contained in:
Markus Fröschle
2012-10-12 15:45:50 +00:00
parent d4ecd8a366
commit cd603546d7
44 changed files with 1990 additions and 1290 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
BaS_GNU/sources/BaS.c
View File

@@ -203,7 +203,7 @@ void BaS(void)
/* TT-RAM */
* (uint32_t *) 0x5a4 = __Bas_base; /* ramtop TOS system variable */
* (uint32_t *) 0x5a4 = (uint32_t *) __Bas_base; /* ramtop TOS system variable */
* (uint32_t *) 0x5a8 = 0x1357bd13; /* ramvalid TOS system variable */
/* init ACIA */

77
BaS_GNU/sources/sd_card.c
View File

@@ -3,64 +3,59 @@
*/
#include <MCF5475.h>
#include <stdint.h>
#define dspi_dtar0 0x0c
#define dspi_dsr 0x2c
#define dspi_dtfr 0x34
#define dspi_drfr 0x38
#define time1us 1320
#define dspi_dtar0 0x0c
#define dspi_dsr 0x2c
#define dspi_dtfr 0x34
#define dspi_drfr 0x38
#define time1us 1320
extern void wait_10ms(void);
void sd_com(void) // byt senden und holen ---------------------
uint8_t sd_com(uint32_t cmd)
{
uint8_t res;
asm
{
MCF_DSPI_DTFR = cmd;
while (! MCF_DSPI_DSR & (1 << 7));
move.l d4,dspi_dtfr(a0)
wait_auf_complett:
btst.b #7,dspi_dsr(a0)
beq wait_auf_complett
move.l dspi_drfr(a0),d5
mov3q.l #-1,dspi_dsr(a0) // clr status register
}
res = MCF_DSPI_DRFR;
MCF_DSPI_DSR = -1L;
return res;
}
void sd_get_status(void) // status holen -------------------------------
/*
* fetch status from SD controller
*/
uint8_t sd_get_status(void)
{
asm
{
sd_get_status:
move.b #0xff,d4
bsr sd_com
cmp.b #0xff,d5
beq sd_get_status
}
uint8_t res;
while ((res = sd_com(0xff)) == 0xff);
return res;
}
void sd_rcv_info(void) // daten holen ----------------------------
void sd_rcv_info(uint8_t *buf, uint32_t size)
{
asm
{
moveq #18,d3 // 16 byts + 2 byts crc
move.b #0xff,d4
sd_rcv_rb_w:
bsr sd_get_status
cmp.b #0xfe,d5 // daten bereit?
bne sd_rcv_rb_w // nein->
sd_rcv_rd_rb:
bsr sd_com
move.b d5,(a2)+
subq.l #1,d3
bne sd_rcv_rd_rb
}
uint32_t rcvd = 0;
while (sd_get_status() != 0xfe); /* loop until data available */
do {
*buf++ = sd_com(0x18);
rcvd++;
} while (rcvd <= size);
}
void sd_card_idle(void)
{
#ifdef _NOT_USED_
asm
{
// sd idle
@@ -85,8 +80,11 @@ void sd_card_idle(void)
move.b #0x95,d4
bsr sd_com
}
#endif
}
#ifdef _NOT_USED_
int sd_card_init(void)
{
@@ -591,3 +589,4 @@ sd_csw_ok:
}
return status;
}
#endif /* _NOT_USED */

10
BaS_GNU/sources/sd_ide.c
View File

@@ -3,10 +3,10 @@
#include "MCF5475.h"
#include "startcf.h"
extern unsigned long far __SP_AFTER_RESET[];
extern unsigned long far __Bas_base[];
extern unsigned long __SP_AFTER_RESET[];
extern unsigned long __Bas_base[];
/* imported routines */
/* imported routines */
//extern int warten_20ms();
//extern int warten_200us();
//extern int warten_10us();
@@ -112,7 +112,7 @@ wait_of_aktiv:
sd_init_ok:
// blockgr<67>sse 512byt
// blockgr<67>sse 512byt
sd_bg:
bsr sd_16clk
moveq #0x50,d4
@@ -451,7 +451,7 @@ ide_test_loop3:
bsr drq_wait
bsr ds_tx
bsr wait_int
// fertig und zur<75>ck
// fertig und zur<75>ck
nop
rts
// wait auf int

29
BaS_GNU/sources/startcf.S → BaS_GNU/sources/startcf.c
View File

@@ -16,37 +16,31 @@
* main it will call C++ destructors and call exit to terminate.
*/
#ifdef __cplusplus
#pragma cplusplus off
#endif
#pragma PID off
#pragma PIC off
#include <MCF5475.h>
/* imported data */
/* imported data */
extern uint32_t _SP_INIT, _SDA_BASE;
extern uint32_t _START_BSS, _END_BSS;
extern uint32_t _START_SBSS, _END_SBSS;
extern uint32_t __DATA_RAM, __DATA_ROM, __DATA_END;
extern uint32_t __Bas_base;
extern unsigned long far _SP_INIT, _SDA_BASE;
extern unsigned long far _START_BSS, _END_BSS;
extern unsigned long far _START_SBSS, _END_SBSS;
extern unsigned long far __DATA_RAM, __DATA_ROM, __DATA_END;
extern unsigned long far __Bas_base;
extern uint32_t __SUP_SP,__BOOT_FLASH;
extern uint32_t rt_mbar;
extern unsigned long far __SUP_SP,__BOOT_FLASH;
extern unsigned long far rt_mbar;
/* imported routines */
/* imported routines */
extern int BaS(int, char **);
/* exported routines */
/* exported routines */
extern void __initialize_hardware(void);
extern void init_slt(void);
void _startup(void)
{
#ifdef _NOT_USED_
asm("\n\t"
"bra warmstart\n\t"
"jmp __BOOT_FLASH + 8 // ist zugleich reset vector\n\t"
@@ -79,4 +73,5 @@ void _startup(void)
// initialize any hardware specific issues
bra __initialize_hardware
");
#endif /* _NOT_USED_ */
}

2
BaS_GNU/sources/startcf.h
View File

@@ -40,7 +40,7 @@
#define halten_movep
#define halten_ewf
#define DIP_SWITCH (*(vuint8 *)(&__MBAR[0xA2C]))
#define DIP_SWITCH (*(volatile uint8_t *)(&__MBAR[0xA2C]))
#define DIP_SWITCHa ___MBAR + 0xA2C
#define sca_page_ID 6

6
BaS_GNU/sources/sysinit.c
View File

@@ -237,7 +237,7 @@ void init_fpga(void)
/*
* excerpt from an Altera configuration manual:
* The low-to-high transition of nCONFIG on the FPGA begins the configuration cycle. The
* configuration cycle consists of 3 stages<65>reset, configuration, and initialization.
* configuration cycle consists of 3 stages<65>reset, configuration, and initialization.
* While nCONFIG is low, the device is in reset. When the device comes out of reset,
* nCONFIG must be at a logic high level in order for the device to release the open-drain
* nSTATUS pin. After nSTATUS is released, it is pulled high by a pull-up resistor and the FPGA
@@ -527,8 +527,8 @@ void test_upd720101(void)
* TFP410 (vdi) einschalten /*
*/
void vdi_on(void) {
uint8 RBYT;
uint8 DBYT;
uint8_t RBYT;
uint8_t DBYT;
int versuche;
int startzeit;