changed types to use <stdint.h>
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@@ -24,31 +24,31 @@
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_DSPI_DMCR (*(vuint32*)(&__MBAR[0x8A00]))
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#define MCF_DSPI_DTCR (*(vuint32*)(&__MBAR[0x8A08]))
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#define MCF_DSPI_DCTAR0 (*(vuint32*)(&__MBAR[0x8A0C]))
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#define MCF_DSPI_DCTAR1 (*(vuint32*)(&__MBAR[0x8A10]))
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#define MCF_DSPI_DCTAR2 (*(vuint32*)(&__MBAR[0x8A14]))
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#define MCF_DSPI_DCTAR3 (*(vuint32*)(&__MBAR[0x8A18]))
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#define MCF_DSPI_DCTAR4 (*(vuint32*)(&__MBAR[0x8A1C]))
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#define MCF_DSPI_DCTAR5 (*(vuint32*)(&__MBAR[0x8A20]))
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#define MCF_DSPI_DCTAR6 (*(vuint32*)(&__MBAR[0x8A24]))
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#define MCF_DSPI_DCTAR7 (*(vuint32*)(&__MBAR[0x8A28]))
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#define MCF_DSPI_DSR (*(vuint32*)(&__MBAR[0x8A2C]))
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#define MCF_DSPI_DIRSR (*(vuint32*)(&__MBAR[0x8A30]))
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#define MCF_DSPI_DTFR (*(vuint32*)(&__MBAR[0x8A34]))
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#define MCF_DSPI_DRFR (*(vuint32*)(&__MBAR[0x8A38]))
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#define MCF_DSPI_DTFDR0 (*(vuint32*)(&__MBAR[0x8A3C]))
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#define MCF_DSPI_DTFDR1 (*(vuint32*)(&__MBAR[0x8A40]))
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#define MCF_DSPI_DTFDR2 (*(vuint32*)(&__MBAR[0x8A44]))
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#define MCF_DSPI_DTFDR3 (*(vuint32*)(&__MBAR[0x8A48]))
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#define MCF_DSPI_DRFDR0 (*(vuint32*)(&__MBAR[0x8A7C]))
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#define MCF_DSPI_DRFDR1 (*(vuint32*)(&__MBAR[0x8A80]))
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#define MCF_DSPI_DRFDR2 (*(vuint32*)(&__MBAR[0x8A84]))
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#define MCF_DSPI_DRFDR3 (*(vuint32*)(&__MBAR[0x8A88]))
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#define MCF_DSPI_DCTAR(x) (*(vuint32*)(&__MBAR[0x8A0C + ((x)*0x4)]))
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#define MCF_DSPI_DTFDR(x) (*(vuint32*)(&__MBAR[0x8A3C + ((x)*0x4)]))
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#define MCF_DSPI_DRFDR(x) (*(vuint32*)(&__MBAR[0x8A7C + ((x)*0x4)]))
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#define MCF_DSPI_DMCR (*(volatile uint32_t*)(&__MBAR[0x8A00]))
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#define MCF_DSPI_DTCR (*(volatile uint32_t*)(&__MBAR[0x8A08]))
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#define MCF_DSPI_DCTAR0 (*(volatile uint32_t*)(&__MBAR[0x8A0C]))
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#define MCF_DSPI_DCTAR1 (*(volatile uint32_t*)(&__MBAR[0x8A10]))
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#define MCF_DSPI_DCTAR2 (*(volatile uint32_t*)(&__MBAR[0x8A14]))
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#define MCF_DSPI_DCTAR3 (*(volatile uint32_t*)(&__MBAR[0x8A18]))
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#define MCF_DSPI_DCTAR4 (*(volatile uint32_t*)(&__MBAR[0x8A1C]))
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#define MCF_DSPI_DCTAR5 (*(volatile uint32_t*)(&__MBAR[0x8A20]))
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#define MCF_DSPI_DCTAR6 (*(volatile uint32_t*)(&__MBAR[0x8A24]))
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#define MCF_DSPI_DCTAR7 (*(volatile uint32_t*)(&__MBAR[0x8A28]))
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#define MCF_DSPI_DSR (*(volatile uint32_t*)(&__MBAR[0x8A2C]))
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#define MCF_DSPI_DIRSR (*(volatile uint32_t*)(&__MBAR[0x8A30]))
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#define MCF_DSPI_DTFR (*(volatile uint32_t*)(&__MBAR[0x8A34]))
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#define MCF_DSPI_DRFR (*(volatile uint32_t*)(&__MBAR[0x8A38]))
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#define MCF_DSPI_DTFDR0 (*(volatile uint32_t*)(&__MBAR[0x8A3C]))
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#define MCF_DSPI_DTFDR1 (*(volatile uint32_t*)(&__MBAR[0x8A40]))
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#define MCF_DSPI_DTFDR2 (*(volatile uint32_t*)(&__MBAR[0x8A44]))
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#define MCF_DSPI_DTFDR3 (*(volatile uint32_t*)(&__MBAR[0x8A48]))
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#define MCF_DSPI_DRFDR0 (*(volatile uint32_t*)(&__MBAR[0x8A7C]))
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#define MCF_DSPI_DRFDR1 (*(volatile uint32_t*)(&__MBAR[0x8A80]))
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#define MCF_DSPI_DRFDR2 (*(volatile uint32_t*)(&__MBAR[0x8A84]))
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#define MCF_DSPI_DRFDR3 (*(volatile uint32_t*)(&__MBAR[0x8A88]))
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#define MCF_DSPI_DCTAR(x) (*(volatile uint32_t*)(&__MBAR[0x8A0C + ((x)*0x4)]))
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#define MCF_DSPI_DTFDR(x) (*(volatile uint32_t*)(&__MBAR[0x8A3C + ((x)*0x4)]))
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#define MCF_DSPI_DRFDR(x) (*(volatile uint32_t*)(&__MBAR[0x8A7C + ((x)*0x4)]))
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/* Bit definitions and macros for MCF_DSPI_DMCR */
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