renamed "slot" to "device" for better wording
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@@ -168,7 +168,7 @@ _mmu_init:
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// 00D0'0000 - 0x00DF'FFFF (last megabyte of ST RAM = Falcon video memory) locked ID=6
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// mapped to physical address 60D0'0000 (FPGA video memory)
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// video ram: read write execute normal write true
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#ifdef MACHINE_FIREBEE
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#if MACHINE_FIREBEE
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move.l #0x00d00000|MCF_MMU_MMUTR_ID(sca_page_ID)|std_mmutr,d0
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move.l #0x60d00000|writethrough_mmudr|MCF_MMU_MMUDR_LK,d1
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move.l d0,MCF_MMU_MMUTR
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@@ -196,13 +196,23 @@ _mmu_init:
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// this maps virtual 0x00F0'0000 - 0x00FF'FFFF to physical 0xFFF0'0000 - 0xFFFF'FFFF effectively making I/O area
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// accesses ST-compatible (just the same what Atari made for TT and Falcon). This does not get mapped for the
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// m5484LITE boards which enables us to later act on I/O access attempts during a page miss exception
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#ifdef MACHINE_FIREBEE
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#if MACHINE_FIREBEE
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move.l #0x00f00000|std_mmutr,d0
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move.l #0xfff00000|nocache_precise_mmudr|MCF_MMU_MMUDR_LK,d1
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move.l d0,MCF_MMU_MMUTR
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move.l d1,MCF_MMU_MMUDR
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move.l d2,MCF_MMU_MMUOR // mapped to ffffxxx, precise,
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move.l d3,MCF_MMU_MMUOR // mapped to ffffxxx, precise,
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#elif MACHINE_M5484LITE
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//
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// Instead, we lock PCI address space. Uncached, precise. For now, only for the M5484LITE
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//
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move.l #0x80000000|std_mmutr,d0
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move.l #0x80000000|nocache_precise_mmudr|MCF_MMU_MMUDR_LK,d1
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move.l d0,MCF_MMU_MMUTR
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move.l d1,MCF_MMU_MMUDR
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move.l d2,MCF_MMU_MMUOR // mapped to ffffxxx, precise,
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move.l d3,MCF_MMU_MMUOR // mapped to ffffxxx, precise,
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#endif /* MACHINE_FIREBEE */
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// maps (locked) the last MB (this is where BaS .data and .bss resides) of physical SDRAM to the same physical address
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