From ad9f0688b371c593e88cb870c5e15770c31f7885 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Markus=20Fr=C3=B6schle?= Date: Wed, 31 Oct 2012 14:28:27 +0000 Subject: [PATCH] corrected FPGA copy loop --- sources/init_fpga.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sources/init_fpga.c b/sources/init_fpga.c index 8e8ada4..f0f0b43 100644 --- a/sources/init_fpga.c +++ b/sources/init_fpga.c @@ -83,7 +83,7 @@ void init_fpga(void) MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK; MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK; } - } while ((!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)) || (fpga_data < (uint8_t *) FPGA_FLASH_DATA_END)); + } while ((!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)) && (fpga_data < (uint8_t *) FPGA_FLASH_DATA_END)); if (fpga_data < (uint8_t *) FPGA_FLASH_DATA_END) {