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modified for M5484LITE

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This commit is contained in:
Markus Fröschle
2013-11-07 19:49:35 +00:00
parent 0b5519fa76
commit a77806930c
1 changed files with 39 additions and 42 deletions
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81
flash_scripts/flash_m548x_bas.bdm
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@@ -4,39 +4,45 @@
# #
open $1 open $1
reset reset
sleep 10
wait wait
# Turn on MBAR at 0xFF00_0000
write-ctrl 0x0C0F 0xFF000000
# set VBR # set VBR
write-ctrl 0x0801 0x00000000 write-ctrl 0x0801 0x00000000
dump-register VBR
# Turn on MBAR at 0xFF00_0000
write-ctrl 0x0C0F 0xFF000000
dump-register MBAR
# Turn on RAMBAR0 at address FF10_0000
write-ctrl 0x0C04 0xFF100007
# Turn on RAMBAR1 at address FF10_1000 (disabled - not mapped by bdm currently)
write-ctrl 0x0C05 0xFF101001
# #
# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) # Init CS0 (BootFLASH @ E000_0000 - E03F_FFFF 4Mbytes)
write 0xFF000500 0xE0000000 4 write 0xFF000500 0xE0000000 4
write 0xFF000508 0x00001180 4 write 0xFF000508 0x00041180 4
write 0xFF000504 0x007F0001 4 write 0xFF000504 0x003F0001 4
# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes # SDRAM Initialization @ 0000_0000 - 03FF_FFFF 64 Mbytes
write 0xFF000004 0x000002AA 4 # SDRAMDS configuration write 0xFF000004 0x000002AA 4 # SDRAMDS configuration
write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF) write 0xFF000020 0x00000019 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF) write 0xFF000024 0x08000000 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF) write 0xFF000028 0x10000000 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF) write 0xFF00002C 0x18000000 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
write 0xFF000108 0x73622830 4 # SDCFG1 write 0xFF000108 0x73711630 4 # SDCFG1
write 0xFF00010C 0x46770000 4 # SDCFG2 write 0xFF00010C 0x46370000 4 # SDCFG2
write 0xFF000104 0xE10D0002 4 # SDCR + IPALL write 0xFF000104 0xE10B0002 4 # SDCR + IPALL
write 0xFF000100 0x40010000 4 # SDMR (write to LEMR) write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
write 0xFF000100 0x048D0000 4 # SDMR (write to LMR) write 0xFF000100 0x058D0000 4 # SDMR (write to LMR)
sleep 100 sleep 100
write 0xFF000104 0xE10D0002 4 # SDCR + IPALL write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
write 0xFF000100 0x008D0000 4 # SDMR (write to LMR) write 0xFF000100 0x018D0000 4 # SDMR (write to LMR)
write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh) write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
sleep 10 sleep 10
@@ -44,9 +50,9 @@ sleep 10
# use system sdram as flashlib scratch area. # use system sdram as flashlib scratch area.
# TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet. # TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet.
# This seems to be related to large flash buffers and PC-relative adressing of the plugin # This seems to be related to large flash buffers and PC-relative adressing of the plugin
flash-plugin 0x1000 0xf000 flash29.plugin #flash-plugin 0x1000 0xf000 flash29.plugin
# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29 # notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
flash 0xE0000000 flash 0xE0000000 flashintelc3
# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for BaS) # Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for BaS)
# #
@@ -55,26 +61,17 @@ flash 0xE0000000
# #
# contrary to documentation, it seems we need to erase-wait after each sector # contrary to documentation, it seems we need to erase-wait after each sector
erase 0xE0000000 0x00000 erase 0xE0000000 -1
erase-wait 0xE0000000 #erase 0xE0000000 0x01000
erase 0xE0000000 0x01000 #erase 0xE0000000 0x02000
erase-wait 0xE0000000 #erase 0xE0000000 0x03000
erase 0xE0000000 0x02000 #erase 0xE0000000 0x04000
erase-wait 0xE0000000 #erase 0xE0000000 0x05000
erase 0xE0000000 0x03000 #erase 0xE0000000 0x06000
erase-wait 0xE0000000 #erase 0xE0000000 0x07000
erase 0xE0000000 0x04000 #erase 0xE0000000 0x08000
erase-wait 0xE0000000 #erase 0xE0000000 0x10000
erase 0xE0000000 0x05000 #erase-wait 0xe0000000
erase-wait 0xE0000000 #blank-chk 0xE0000000 0x10000
erase 0xE0000000 0x06000 load -v m5484lite/bas.elf
erase-wait 0xE0000000
erase 0xE0000000 0x07000
erase-wait 0xE0000000
erase 0xE0000000 0x08000
erase-wait 0xE0000000
erase 0xE0000000 0x10000
erase-wait 0xE0000000
blank-chk 0xE0000000 0x10000
load -v bas.elf
wait wait