This commit is contained in:
Markus Fröschle
264
BaS_GNU/sources/BaS.c
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264
BaS_GNU/sources/BaS.c
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/*
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* BaS
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*
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*/
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#include <stdint.h>
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#include "MCF5475.h"
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#include "MCF5475_SLT.h"
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#include "startcf.h"
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extern unsigned long far __SP_AFTER_RESET[];
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extern unsigned long far __Bas_base[];
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/* imported routines */
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extern int mmu_init();
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extern int mmutr_miss();
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extern int vec_init();
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extern int illegal_table_make();
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extern int cf68k_initialize();
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/*
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* warte_routinen
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*/
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void warte_10ms(void)
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{
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register uint32_t target = MCF_SLT_SCNT(0) - 1320000;
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while (MCF_SLT_SCNT(0) > target);
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}
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void warte_1ms(void)
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{
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register uint32_t target = MCF_SLT_SCNT(0) - 132000;
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while (MCF_SLT_SCNT(0) > target);
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}
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void warte_100us(void)
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{
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register uint32_t target = MCF_SLT_SCNT(0) - 13200;
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while (MCF_SLT_SCNT(0) > target);
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}
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void warte_50us(void)
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{
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register uint32_t target = MCF_SLT_SCNT(0) - 6600;
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while (MCF_SLT_SCNT(0) > target);
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}
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void warte_10us(void)
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{
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register uint32_t target = MCF_SLT_SCNT(0) - 1320;
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while (MCF_SLT_SCNT(0) > target);
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}
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void warte_1us(void)
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{
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register uint32_t target = MCF_SLT_SCNT(0) - 132;
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while (MCF_SLT_SCNT(0) > target);
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}
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/********************************************************************/
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void BaS(void)
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{
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int az_sectors;
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int sd_status,i;
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uint8_t *src;
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uint8_t *dst;
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az_sectors = sd_card_init();
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if(az_sectors>0)
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{
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sd_card_idle();
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}
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if (DIP_SWITCH & (1 << 6))
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{
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copy_firetos();
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}
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MCF_PSC3_PSCTB_8BIT = 'ACPF';
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warte_10ms();
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MCF_PSC0_PSCTB_8BIT = 'PIC ';
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MCF_PSC0_PSCTB_8BIT = MCF_PSC3_PSCRB_8BIT;
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MCF_PSC0_PSCTB_8BIT = MCF_PSC3_PSCRB_8BIT;
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MCF_PSC0_PSCTB_8BIT = MCF_PSC3_PSCRB_8BIT;
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MCF_PSC0_PSCTB_8BIT = 0x0d0a;
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MCF_PSC3_PSCTB_8BIT = 0x01; /* request RTC data */
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/* copy tos */
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if (DIP_SWITCH & (1 << 6))
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{
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/* copy EMUTOS */
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src = (uint8_t *) 0xe0600000L;
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while (src < 0xe0700000L)
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{
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*dst++ = *src++;
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}
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}
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else
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{
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/* copy FireTOS */
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src = 0xe0400000L;
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while (src < 0xe0500000L)
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{
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*dst++ = *src++;
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}
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}
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if (!DIP_SWITCH & (1 << 6))
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{
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}
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/***************************************************************/
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/* div inits
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/***************************************************************/
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div_inits:
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move.b DIP_SWITCH,d0 // dip schalter adresse
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btst.b #6,d0
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beq video_setup
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// rtc daten, mmu set, etc nur wenn switch 6 = off
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lea 0xffff8961,a0
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clr.l d1
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moveq #64,d2
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move.b (a4),d0
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cmp.b #0x81,d0
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bne not_rtc
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loop_sr:
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move.b (a4),d0
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move.b d1,(a0)
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move.b d0,2(a0)
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addq.l #1,d1
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cmp.b d1,d2
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bne loop_sr
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/*
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// Set the NVRAM checksum as invalid
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move.b #63,(a0)
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move.b 2(a0),d0
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add #1,d0
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move.b d0,2(a0)
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*/
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not_rtc:
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bsr mmu_init
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bsr vec_init
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bsr illegal_table_make
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// interrupts
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clr.l 0xf0010004 // disable all interrupts
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lea MCF_EPORT_EPPAR,a0
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move.w #0xaaa8,(a0) // falling edge all,
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// timer 0 on mit int -> video change -------------------------------------------
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move.l #MCF_GPT_GMS_ICT(1)|MCF_GPT_GMS_IEN|MCF_GPT_GMS_TMS(1),d0 //caputre mit int on rising edge
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move.l d0,MCF_GPT0_GMS
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moveq.l #0x3f,d0 // max prority interrutp
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move.b d0,MCF_INTC_ICR62 // setzen
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// -------------------------------------------------
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move.b #0xfe,d0
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move.b d0,0xf0010004 // enable int 1-7
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nop
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lea MCF_EPORT_EPIER,a0
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move.b #0xfe,(a0) // int 1-7 on
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nop
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lea MCF_EPORT_EPFR,a0
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move.b #0xff,(a0) // alle pending interrupts l<>schen
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nop
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lea MCF_INTC_IMRL,a0
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move.l #0xFFFFFF00,(a0) // int 1-7 on
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lea MCF_INTC_IMRH,a0
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move.l #0xBFFFFFFE,(a0) // psc3 and timer 0 int on
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move.l #MCF_MMU_MMUCR_EN,d0
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move.l d0,MCF_MMU_MMUCR // mmu on
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nop
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nop
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/********************************************************************/
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/* IDE reset
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/********************************************************************/
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lea 0xffff8802,a0
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move.b #14,-2(a0)
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move.b #0x80,(a0)
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bsr warte_1ms
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clr.b (a0)
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/********************************************************************/
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/* video setup
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/********************************************************************/
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video_setup:
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lea 0xf0000410,a0
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// 25MHz
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move.l #0x032002ba,(a0)+ // horizontal 640x480
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move.l #0x020c020a,(a0)+ // vertikal 640x480
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move.l #0x0190015d,(a0)+ // horizontal 320x240
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move.l #0x020C020A,(a0)+ // vertikal 320x240 */
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/*
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// 32MHz
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move.l #0x037002ba,(a0)+ // horizontal 640x480
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move.l #0x020d020a,(a0)+ // vertikal 640x480
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move.l #0x02A001e0,(a0)+ // horizontal 320x240
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move.l #0x05a00160,(a0)+ // vertikal 320x240
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*/
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lea -0x20(a0),a0
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move.l #0x01070002,(a0) // fifo on, refresh on, ddrcs und cke on, video dac on,
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/********************************************************************/
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/* memory setup
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/********************************************************************/
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lea 0x400,a0
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lea 0x800,a1
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mem_clr_loop:
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clr.l (a0)+
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clr.l (a0)+
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clr.l (a0)+
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clr.l (a0)+
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cmp.l a0,a1
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bgt mem_clr_loop
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moveq #0x48,d0
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move.b d0,0xffff8007
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// stram
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move.l #0xe00000,d0 // ende stram
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move.l d0,0x42e
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move.l #0x752019f3,d0 // memvalid
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move.l d0,0x420
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move.l #0x237698aa,d0 // memval2
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move.l d0,0x43a
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move.l #0x5555aaaa,d0 // memval3
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move.l d0,0x51a
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// ttram
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move.l #__Bas_base,d0 // ende ttram
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move.l d0,0x5a4
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move.l #0x1357bd13,d0 // ramvalid
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move.l d0,0x5a8
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// init acia
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moveq #3,d0
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move.b d0,0xfffffc00
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nop
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move.b d0,0xfffffc04
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nop
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moveq #0x96,d0
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move.b d0,0xfffffc00
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moveq #-1,d0
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nop
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move.b d0,0xfffffa0f
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nop
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move.b d0,0xfffffa11
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nop
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// test auf protect mode ---------------------
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move.b DIP_SWITCH,d0
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btst #7,d0
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beq no_protect // nein->
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move.w #0x0700,sr
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no_protect:
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jmp 0xe00030
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}
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}
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