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fixed alignment for (at least for some) registers that can be used 8, 16 or 32 bit wide

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This commit is contained in:
Markus Fröschle
2012-10-24 19:40:12 +00:00
parent 25c380750c
commit 9b0a18100f
3 changed files with 34 additions and 9 deletions
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8
BaS_GNU/.gdbinit Normal file
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@@ -0,0 +1,8 @@
set disassemble-next-line on
define tr
target remote | m68k-atari-mint-gdbserver pipe /dev/bdmcf3
end
tr
source 5474.gdb

33
BaS_GNU/sources/BaS.c
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@@ -9,6 +9,7 @@
#include "startcf.h" #include "startcf.h"
#include "cache.h" #include "cache.h"
#define uart_out_word(a) MCF_PSC3_PSCTB_8BIT = (a)
extern uint32_t Bas_base[]; extern uint32_t Bas_base[];
extern uint8_t tos_base[]; extern uint8_t tos_base[];
@@ -38,34 +39,42 @@ void BaS(void)
uint8_t *dst = tos_base; uint8_t *dst = tos_base;
uint32_t *adr; uint32_t *adr;
#ifdef _NOT_USED_
az_sectors = sd_card_init(); az_sectors = sd_card_init();
if (az_sectors > 0) if (az_sectors > 0)
{ {
sd_card_idle(); sd_card_idle();
} }
#endif /* _NOT_USED_ */
/* Initialize the NVRAM */ /* Initialize the NVRAM */
MCF_PSC3_PSCTB_8BIT = 'ACPF'; MCF_PSC3_PSCTB_8BIT = 'ACPF';
wait_10ms(); wait_10ms();
MCF_PSC0_PSCTB_8BIT = 'PIC '; uart_out_word('PIC ');
MCF_PSC0_PSCTB_8BIT = MCF_PSC3_PSCRB_8BIT; * (volatile uint8_t *) &_MBAR[0x860C] = (uint8_t) (MCF_PSC3_PSCRB_8BIT);
MCF_PSC0_PSCTB_8BIT = MCF_PSC3_PSCRB_8BIT; * (volatile uint8_t *) &_MBAR[0x860C] = (uint8_t) (MCF_PSC3_PSCRB_8BIT);
MCF_PSC0_PSCTB_8BIT = MCF_PSC3_PSCRB_8BIT; * (volatile uint8_t *) &_MBAR[0x860C] = (uint8_t) (MCF_PSC3_PSCRB_8BIT);
MCF_PSC0_PSCTB_8BIT = 0x0d0a;
MCF_PSC3_PSCTB_8BIT = 0x01; /* request RTC data */ uart_out_word(0x0d0a);
if (MCF_PSC3_PSCRB_8BIT == 0x81) //MCF_PSC3_PSCTB_8BIT = 0x01; /* request RTC data */
* (uint8_t *) &_MBAR[0x890C] = 0x01;
//if (MCF_PSC3_PSCRB_8BIT == 0x81)
if (* (uint8_t *) &_MBAR[0X890C] == 0x81)
{ {
for (i = 0; i < 64; i++) for (i = 0; i < 64; i++)
{ {
* (uint8_t *) 0xffff8963 = MCF_PSC3_PSCRB_8BIT; /* Copy the NVRAM data from the PIC to the FPGA */ * (uint8_t *) 0xffff8963 = (uint8_t) MCF_PSC3_PSCRB_8BIT; /* Copy the NVRAM data from the PIC to the FPGA */
} }
uart_out_word(' OK!');
} }
/* copy EMUTOS */ /* copy EMUTOS */
src = (uint8_t *)EMUTOS; src = (uint8_t *)EMUTOS;
while (src < (uint8_t *)(EMUTOS + EMUTOS_SIZE)) while (src < (uint8_t *)(EMUTOS + EMUTOS_SIZE))
@@ -76,9 +85,17 @@ void BaS(void)
/* we have copied a code area, so flush the caches */ /* we have copied a code area, so flush the caches */
flush_and_invalidate_caches(); flush_and_invalidate_caches();
uart_out_word('MMU ');
mmu_init(); mmu_init();
uart_out_word(' OK!');
uart_out_word('EXC ');
vec_init(); vec_init();
uart_out_word(' OK!');
uart_out_word('ILLG');
illegal_table_make(); illegal_table_make();
uart_out_word(' OK!');
/* interrupts */ /* interrupts */

2
BaS_GNU/sources/sysinit.c
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@@ -73,7 +73,7 @@ void wait_1us(void)
void init_slt(void) void init_slt(void)
{ {
MCF_SLT0_STCNT = 0xffffffff; MCF_SLT0_STCNT = 0xffffffff;
MCF_SLT0_SCR = 0x05; MCF_SLT0_SCR = 0x05000000;
uart_out_word('SLT '); uart_out_word('SLT ');
uart_out_word('OK! '); uart_out_word('OK! ');