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implemented initial version of XLB PCI interrupt handler. For now it

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just reports and clears errors.
This commit is contained in:
Markus Fröschle
2015-01-12 07:25:16 +00:00
parent dd83bee852
commit 852f925c55
2 changed files with 27 additions and 6 deletions
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12
BaS_gcc/sys/BaS.c
View File

@@ -321,12 +321,12 @@ void init_isr(void)
}
MCF_XLB_XARB_IMR = MCF_XLB_XARB_IMR_SEAE | /* slave error acknowledge interrupt */
MCF_XLB_XARB_IMR_MME | /* multiple master at prio 0 interrupt */
MCF_XLB_XARB_IMR_TTAE | /* TT address only interrupt */
MCF_XLB_XARB_IMR_TTRE | /* TT reserved interrupt enable */
MCF_XLB_XARB_IMR_ECWE | /* external control word interrupt */
MCF_XLB_XARB_IMR_TTME | /* TBST/TSIZ mismatch interrupt */
MCF_XLB_XARB_IMR_BAE; /* bus activity tenure timeout interrupt */
MCF_XLB_XARB_IMR_MME | /* multiple master at prio 0 interrupt */
MCF_XLB_XARB_IMR_TTAE | /* TT address only interrupt */
MCF_XLB_XARB_IMR_TTRE | /* TT reserved interrupt enable */
MCF_XLB_XARB_IMR_ECWE | /* external control word interrupt */
MCF_XLB_XARB_IMR_TTME | /* TBST/TSIZ mismatch interrupt */
MCF_XLB_XARB_IMR_BAE; /* bus activity tenure timeout interrupt */
if (!isr_register_handler(64 + INT_SOURCE_PCIARB, 7, 1, pciarb_interrupt_handler, NULL, NULL))
{

21
BaS_gcc/sys/interrupts.c
View File

@@ -263,8 +263,29 @@ bool pic_interrupt_handler(void *arg1, void *arg2)
bool xlbpci_interrupt_handler(void *arg1, void *arg2)
{
uint32_t reason;
dbg("XLB PCI interrupt\r\n");
reason = MCF_PCI_PCIISR;
if (reason & MCF_PCI_PCIISR_RE)
{
err("Retry error. Retry terminated or max retries reached. Cleared\r\n");
MCF_PCI_PCIISR |= MCF_PCI_PCIISR_RE;
}
if (reason & MCF_PCI_PCIISR_IA)
{
err("Initiator abort. No target answered in time. Cleared.\r\n");
MCF_PCI_PCIISR |= MCF_PCI_PCIISR_IA;
}
if (reason & MCF_PCI_PCIISR_TA)
{
err("Target abort. Cleared.\r\n");
MCF_PCI_PCIISR |= MCF_PCI_PCIISR_TA;
}
return true;
}