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@@ -66,7 +66,7 @@ static void xputchar(int c)
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"bsr printf_helper\n\t"
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/* output */:
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/* input */: "r" (c)
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/* clobber */: "d0","d2","a0"
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/* clobber */: "d0","d2","a0","memory"
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);
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}
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@@ -14,32 +14,28 @@
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#define FPGA_CONF_DONE (1 << 5)
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extern void xprintf_before_copy(const char *fmt, ...);
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#define xprintf xprintf_before_copy
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extern void display_progress_before_copy(void);
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extern void wait_10ms();
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#define xprintf xprintf_before_copy
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#define display_progress display_progress_before_copy
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/*
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* load FPGA
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*/
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void init_fpga(void)
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{
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register uint8_t *fpga_data;
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register uint32_t *fpga_data;
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register int i;
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xprintf("FPGA load data...");
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xprintf("FPGA load data...\r\n");
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MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK; /* FPGA clock => low */
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MCF_GPIO_PODR_FEC1L &= ~FPGA_CONFIG; /* FPGA config => low */
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while (((MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS)) || ((MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)));
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wait_10us();
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MCF_GPIO_PODR_FEC1L |= FPGA_CONFIG; /* pull FPGA_CONFIG high */
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wait_10us();
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while (!(MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS)) /* wait until status becomes high */
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{
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wait_10us();
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}
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while ((MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS) && (MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE));
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MCF_GPIO_PODR_FEC1L |= FPGA_CONFIG; /* pull FPGA_CONFIG high */
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while (!(MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS)); /* wait until status becomes high */
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/*
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* excerpt from an Altera configuration manual:
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@@ -60,11 +56,17 @@ void init_fpga(void)
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* which is pulled high by a pull-up resistor. A low to high transition on CONF_DONE indicates
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* configuration is complete and initialization of the device can begin.
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*/
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fpga_data = (uint8_t *) FPGA_FLASH_DATA;
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fpga_data = (uint32_t *) FPGA_FLASH_DATA;
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do
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{
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uint8_t value = *fpga_data++;
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for (i = 0; i < 8; i++, value >>= 1)
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uint32_t value = *fpga_data++;
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if (((int) fpga_data % 0x100) == 0) {
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xprintf("%08x ", fpga_data);
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display_progress();
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}
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for (i = 0; i < 32; i++, value >>= 1)
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{
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if (value & 1)
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@@ -81,9 +83,9 @@ void init_fpga(void)
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MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
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MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
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}
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} while (!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE) && (fpga_data < FPGA_FLASH_DATA_END));
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} while ((!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)) && (fpga_data < (uint32_t *) FPGA_FLASH_DATA_END));
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if (fpga_data < FPGA_FLASH_DATA_END)
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if (fpga_data < (uint32_t *) FPGA_FLASH_DATA_END)
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{
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for (i = 0; i < 4000; i++)
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{
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@@ -12,7 +12,7 @@ void sd_card_idle(void)
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"bsr sd_idle\n\t"
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/* output */:
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/* input */ :
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/* clobber */: "a0","a1","a2","a3","a4","a5","a6",
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/* clobber */: "a0","a1","a2","a3","a4","a5",
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"d0","d1","d2","d3","d4","d5","d6","d7","memory"
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);
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}
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@@ -28,7 +28,7 @@ int sd_card_init(void)
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"bsr.l sd_init\n\t"
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/* output */: "=r" (ret)
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/* input */ :
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/* clobber */: "a0","a1","a2","a3","a4","a5","a6",
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/* clobber */: "a0","a1","a2","a3","a4","a5",
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"d1","d2","d3","d4","d5","d6","d7","memory"
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);
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