more fiddling with leading underscore in symbols

This commit is contained in:
Markus Fröschle
2012-10-14 05:34:33 +00:00
parent ebedb4dc72
commit 5fcc66786e
26 changed files with 939 additions and 939 deletions

View File

@@ -24,54 +24,54 @@
*********************************************************************/
/* Register read/write macros */
#define MCF_SEC_EUACRH (*(volatile uint32_t*)(&__MBAR[0x21000]))
#define MCF_SEC_EUACRL (*(volatile uint32_t*)(&__MBAR[0x21004]))
#define MCF_SEC_SIMRH (*(volatile uint32_t*)(&__MBAR[0x21008]))
#define MCF_SEC_SIMRL (*(volatile uint32_t*)(&__MBAR[0x2100C]))
#define MCF_SEC_SISRH (*(volatile uint32_t*)(&__MBAR[0x21010]))
#define MCF_SEC_SISRL (*(volatile uint32_t*)(&__MBAR[0x21014]))
#define MCF_SEC_SICRH (*(volatile uint32_t*)(&__MBAR[0x21018]))
#define MCF_SEC_SICRL (*(volatile uint32_t*)(&__MBAR[0x2101C]))
#define MCF_SEC_SIDR (*(volatile uint32_t*)(&__MBAR[0x21020]))
#define MCF_SEC_EUASRH (*(volatile uint32_t*)(&__MBAR[0x21028]))
#define MCF_SEC_EUASRL (*(volatile uint32_t*)(&__MBAR[0x2102C]))
#define MCF_SEC_SMCR (*(volatile uint32_t*)(&__MBAR[0x21030]))
#define MCF_SEC_MEAR (*(volatile uint32_t*)(&__MBAR[0x21038]))
#define MCF_SEC_CCCR0 (*(volatile uint32_t*)(&__MBAR[0x2200C]))
#define MCF_SEC_CCPSRH0 (*(volatile uint32_t*)(&__MBAR[0x22010]))
#define MCF_SEC_CCPSRL0 (*(volatile uint32_t*)(&__MBAR[0x22014]))
#define MCF_SEC_CDPR0 (*(volatile uint32_t*)(&__MBAR[0x22044]))
#define MCF_SEC_FR0 (*(volatile uint32_t*)(&__MBAR[0x2204C]))
#define MCF_SEC_CCCR1 (*(volatile uint32_t*)(&__MBAR[0x2300C]))
#define MCF_SEC_CCPSRH1 (*(volatile uint32_t*)(&__MBAR[0x23010]))
#define MCF_SEC_CCPSRL1 (*(volatile uint32_t*)(&__MBAR[0x23014]))
#define MCF_SEC_CDPR1 (*(volatile uint32_t*)(&__MBAR[0x23044]))
#define MCF_SEC_FR1 (*(volatile uint32_t*)(&__MBAR[0x2304C]))
#define MCF_SEC_AFRCR (*(volatile uint32_t*)(&__MBAR[0x28018]))
#define MCF_SEC_AFSR (*(volatile uint32_t*)(&__MBAR[0x28028]))
#define MCF_SEC_AFISR (*(volatile uint32_t*)(&__MBAR[0x28030]))
#define MCF_SEC_AFIMR (*(volatile uint32_t*)(&__MBAR[0x28038]))
#define MCF_SEC_DRCR (*(volatile uint32_t*)(&__MBAR[0x2A018]))
#define MCF_SEC_DSR (*(volatile uint32_t*)(&__MBAR[0x2A028]))
#define MCF_SEC_DISR (*(volatile uint32_t*)(&__MBAR[0x2A030]))
#define MCF_SEC_DIMR (*(volatile uint32_t*)(&__MBAR[0x2A038]))
#define MCF_SEC_MDRCR (*(volatile uint32_t*)(&__MBAR[0x2C018]))
#define MCF_SEC_MDSR (*(volatile uint32_t*)(&__MBAR[0x2C028]))
#define MCF_SEC_MDISR (*(volatile uint32_t*)(&__MBAR[0x2C030]))
#define MCF_SEC_MDIMR (*(volatile uint32_t*)(&__MBAR[0x2C038]))
#define MCF_SEC_RNGRCR (*(volatile uint32_t*)(&__MBAR[0x2E018]))
#define MCF_SEC_RNGSR (*(volatile uint32_t*)(&__MBAR[0x2E028]))
#define MCF_SEC_RNGISR (*(volatile uint32_t*)(&__MBAR[0x2E030]))
#define MCF_SEC_RNGIMR (*(volatile uint32_t*)(&__MBAR[0x2E038]))
#define MCF_SEC_AESRCR (*(volatile uint32_t*)(&__MBAR[0x32018]))
#define MCF_SEC_AESSR (*(volatile uint32_t*)(&__MBAR[0x32028]))
#define MCF_SEC_AESISR (*(volatile uint32_t*)(&__MBAR[0x32030]))
#define MCF_SEC_AESIMR (*(volatile uint32_t*)(&__MBAR[0x32038]))
#define MCF_SEC_CCCRn(x) (*(volatile uint32_t*)(&__MBAR[0x2200C + ((x)*0x1000)]))
#define MCF_SEC_CCPSRHn(x) (*(volatile uint32_t*)(&__MBAR[0x22010 + ((x)*0x1000)]))
#define MCF_SEC_CCPSRLn(x) (*(volatile uint32_t*)(&__MBAR[0x22014 + ((x)*0x1000)]))
#define MCF_SEC_CDPRn(x) (*(volatile uint32_t*)(&__MBAR[0x22044 + ((x)*0x1000)]))
#define MCF_SEC_FRn(x) (*(volatile uint32_t*)(&__MBAR[0x2204C + ((x)*0x1000)]))
#define MCF_SEC_EUACRH (*(volatile uint32_t*)(&_MBAR[0x21000]))
#define MCF_SEC_EUACRL (*(volatile uint32_t*)(&_MBAR[0x21004]))
#define MCF_SEC_SIMRH (*(volatile uint32_t*)(&_MBAR[0x21008]))
#define MCF_SEC_SIMRL (*(volatile uint32_t*)(&_MBAR[0x2100C]))
#define MCF_SEC_SISRH (*(volatile uint32_t*)(&_MBAR[0x21010]))
#define MCF_SEC_SISRL (*(volatile uint32_t*)(&_MBAR[0x21014]))
#define MCF_SEC_SICRH (*(volatile uint32_t*)(&_MBAR[0x21018]))
#define MCF_SEC_SICRL (*(volatile uint32_t*)(&_MBAR[0x2101C]))
#define MCF_SEC_SIDR (*(volatile uint32_t*)(&_MBAR[0x21020]))
#define MCF_SEC_EUASRH (*(volatile uint32_t*)(&_MBAR[0x21028]))
#define MCF_SEC_EUASRL (*(volatile uint32_t*)(&_MBAR[0x2102C]))
#define MCF_SEC_SMCR (*(volatile uint32_t*)(&_MBAR[0x21030]))
#define MCF_SEC_MEAR (*(volatile uint32_t*)(&_MBAR[0x21038]))
#define MCF_SEC_CCCR0 (*(volatile uint32_t*)(&_MBAR[0x2200C]))
#define MCF_SEC_CCPSRH0 (*(volatile uint32_t*)(&_MBAR[0x22010]))
#define MCF_SEC_CCPSRL0 (*(volatile uint32_t*)(&_MBAR[0x22014]))
#define MCF_SEC_CDPR0 (*(volatile uint32_t*)(&_MBAR[0x22044]))
#define MCF_SEC_FR0 (*(volatile uint32_t*)(&_MBAR[0x2204C]))
#define MCF_SEC_CCCR1 (*(volatile uint32_t*)(&_MBAR[0x2300C]))
#define MCF_SEC_CCPSRH1 (*(volatile uint32_t*)(&_MBAR[0x23010]))
#define MCF_SEC_CCPSRL1 (*(volatile uint32_t*)(&_MBAR[0x23014]))
#define MCF_SEC_CDPR1 (*(volatile uint32_t*)(&_MBAR[0x23044]))
#define MCF_SEC_FR1 (*(volatile uint32_t*)(&_MBAR[0x2304C]))
#define MCF_SEC_AFRCR (*(volatile uint32_t*)(&_MBAR[0x28018]))
#define MCF_SEC_AFSR (*(volatile uint32_t*)(&_MBAR[0x28028]))
#define MCF_SEC_AFISR (*(volatile uint32_t*)(&_MBAR[0x28030]))
#define MCF_SEC_AFIMR (*(volatile uint32_t*)(&_MBAR[0x28038]))
#define MCF_SEC_DRCR (*(volatile uint32_t*)(&_MBAR[0x2A018]))
#define MCF_SEC_DSR (*(volatile uint32_t*)(&_MBAR[0x2A028]))
#define MCF_SEC_DISR (*(volatile uint32_t*)(&_MBAR[0x2A030]))
#define MCF_SEC_DIMR (*(volatile uint32_t*)(&_MBAR[0x2A038]))
#define MCF_SEC_MDRCR (*(volatile uint32_t*)(&_MBAR[0x2C018]))
#define MCF_SEC_MDSR (*(volatile uint32_t*)(&_MBAR[0x2C028]))
#define MCF_SEC_MDISR (*(volatile uint32_t*)(&_MBAR[0x2C030]))
#define MCF_SEC_MDIMR (*(volatile uint32_t*)(&_MBAR[0x2C038]))
#define MCF_SEC_RNGRCR (*(volatile uint32_t*)(&_MBAR[0x2E018]))
#define MCF_SEC_RNGSR (*(volatile uint32_t*)(&_MBAR[0x2E028]))
#define MCF_SEC_RNGISR (*(volatile uint32_t*)(&_MBAR[0x2E030]))
#define MCF_SEC_RNGIMR (*(volatile uint32_t*)(&_MBAR[0x2E038]))
#define MCF_SEC_AESRCR (*(volatile uint32_t*)(&_MBAR[0x32018]))
#define MCF_SEC_AESSR (*(volatile uint32_t*)(&_MBAR[0x32028]))
#define MCF_SEC_AESISR (*(volatile uint32_t*)(&_MBAR[0x32030]))
#define MCF_SEC_AESIMR (*(volatile uint32_t*)(&_MBAR[0x32038]))
#define MCF_SEC_CCCRn(x) (*(volatile uint32_t*)(&_MBAR[0x2200C + ((x)*0x1000)]))
#define MCF_SEC_CCPSRHn(x) (*(volatile uint32_t*)(&_MBAR[0x22010 + ((x)*0x1000)]))
#define MCF_SEC_CCPSRLn(x) (*(volatile uint32_t*)(&_MBAR[0x22014 + ((x)*0x1000)]))
#define MCF_SEC_CDPRn(x) (*(volatile uint32_t*)(&_MBAR[0x22044 + ((x)*0x1000)]))
#define MCF_SEC_FRn(x) (*(volatile uint32_t*)(&_MBAR[0x2204C + ((x)*0x1000)]))
/* Bit definitions and macros for MCF_SEC_EUACRH */