(hopefully) fixed a problem with hang when i2c communication to TFP410 fails

This commit is contained in:
Markus Fröschle
2014-12-28 22:47:43 +00:00
parent f871794760
commit 40162047d8
2 changed files with 755 additions and 747 deletions

View File

@@ -422,24 +422,24 @@ void init_fbcs()
| MCF_FBCS_CSCR_AA; /* AA */ | MCF_FBCS_CSCR_AA; /* AA */
MCF_FBCS1_CSMR = MCF_FBCS_CSMR_BAM_1M | MCF_FBCS_CSMR_V; MCF_FBCS1_CSMR = MCF_FBCS_CSMR_BAM_1M | MCF_FBCS_CSMR_V;
MCF_FBCS2_CSAR = 0xF0000000; // NEUER I/O ADRESS-BEREICH MCF_FBCS2_CSAR = 0xF0000000; /* Firebee new I/O address range */
MCF_FBCS2_CSCR = MCF_FBCS_CSCR_PS_32 // 32BIT PORT MCF_FBCS2_CSCR = MCF_FBCS_CSCR_PS_32 /* 32BIT PORT */
| MCF_FBCS_CSCR_WS(8) // DEFAULT 4WS | MCF_FBCS_CSCR_WS(8) /* DEFAULT 4WS */
| MCF_FBCS_CSCR_AA; // AA | MCF_FBCS_CSCR_AA; /* AA */
MCF_FBCS2_CSMR = (MCF_FBCS_CSMR_BAM_128M // F000'0000-F7FF'FFFF MCF_FBCS2_CSMR = (MCF_FBCS_CSMR_BAM_128M /* F000'0000-F7FF'FFFF */
| MCF_FBCS_CSMR_V); | MCF_FBCS_CSMR_V);
MCF_FBCS3_CSAR = 0xF8000000; // NEUER I/O ADRESS-BEREICH MCF_FBCS3_CSAR = 0xF8000000; /* Firebee new I/O address range */
MCF_FBCS3_CSCR = MCF_FBCS_CSCR_PS_16 // 16BIT PORT MCF_FBCS3_CSCR = MCF_FBCS_CSCR_PS_16 /* 16BIT PORT */
| MCF_FBCS_CSCR_AA; // AA | MCF_FBCS_CSCR_AA; // AA
MCF_FBCS3_CSMR = (MCF_FBCS_CSMR_BAM_64M // F800'0000-FBFF'FFFF MCF_FBCS3_CSMR = (MCF_FBCS_CSMR_BAM_64M /* F800'0000-FBFF'FFFF */
| MCF_FBCS_CSMR_V); | MCF_FBCS_CSMR_V);
MCF_FBCS4_CSAR = 0x40000000; // VIDEO RAM BEREICH, #FB_CS3 WIRD NICHT BENÜTZT, DECODE DIREKT AUF DEM FPGA MCF_FBCS4_CSAR = 0x40000000; /* video ram area, FB_CS3 not used, decoded on FPGA */
MCF_FBCS4_CSCR = MCF_FBCS_CSCR_PS_32 // 32BIT PORT MCF_FBCS4_CSCR = MCF_FBCS_CSCR_PS_32 /* 32BIT PORT */
| MCF_FBCS_CSCR_BSTR // BURST READ ENABLE | MCF_FBCS_CSCR_BSTR /* burst read enable */
| MCF_FBCS_CSCR_BSTW; // BURST WRITE ENABLE | MCF_FBCS_CSCR_BSTW; /* burst write enable */
MCF_FBCS4_CSMR = MCF_FBCS_CSMR_BAM_1G // 4000'0000-7FFF'FFFF MCF_FBCS4_CSMR = MCF_FBCS_CSMR_BAM_1G /* 4000'0000-7FFF'FFFF */
| MCF_FBCS_CSMR_V; | MCF_FBCS_CSMR_V;
#elif MACHINE_M5484LITE #elif MACHINE_M5484LITE
/* disable other FBCS for now */ /* disable other FBCS for now */
@@ -645,7 +645,7 @@ static bool i2c_transfer_finished(void)
static void wait_i2c_transfer_finished(void) static void wait_i2c_transfer_finished(void)
{ {
waitfor(100000, i2c_transfer_finished); /* wait until interrupt bit has been set */ waitfor(10000, i2c_transfer_finished); /* wait until interrupt bit has been set */
MCF_I2C_I2SR &= ~MCF_I2C_I2SR_IIF; /* clear interrupt bit (byte transfer finished */ MCF_I2C_I2SR &= ~MCF_I2C_I2SR_IIF; /* clear interrupt bit (byte transfer finished */
} }
@@ -690,7 +690,7 @@ void dvi_on(void)
wait_i2c_transfer_finished(); wait_i2c_transfer_finished();
if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) /* next try if no acknowledge */ if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) /* next try if no acknowledge */
continue; goto try_again;
MCF_I2C_I2DR = 0x00; /* send data: SUB ADRESS 0 */ MCF_I2C_I2DR = 0x00; /* send data: SUB ADRESS 0 */
wait_i2c_transfer_finished(); wait_i2c_transfer_finished();
@@ -700,7 +700,7 @@ void dvi_on(void)
wait_i2c_transfer_finished(); wait_i2c_transfer_finished();
if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) /* next try if no acknowledge */ if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) /* next try if no acknowledge */
continue; goto try_again;
#ifdef _NOT_USED_ #ifdef _NOT_USED_
MCH_I2C_I2CR &= ~MCF_I2C_I2CR_MTX; /* FIXME: not clear where this came from ... */ MCH_I2C_I2CR &= ~MCF_I2C_I2CR_MTX; /* FIXME: not clear where this came from ... */
@@ -720,7 +720,7 @@ void dvi_on(void)
dummyByte = MCF_I2C_I2DR; // dummy read dummyByte = MCF_I2C_I2DR; // dummy read
if (receivedByte != 0x4c) if (receivedByte != 0x4c)
continue; goto try_again;
MCF_I2C_I2CR = 0x0; // stop MCF_I2C_I2CR = 0x0; // stop
MCF_I2C_I2SR = 0x0; // clear sr MCF_I2C_I2SR = 0x0; // clear sr
@@ -733,7 +733,7 @@ void dvi_on(void)
wait_i2c_transfer_finished(); wait_i2c_transfer_finished();
if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK)
continue; goto try_again;
MCF_I2C_I2DR = 0x08; // SUB ADRESS 8 MCF_I2C_I2DR = 0x08; // SUB ADRESS 8
@@ -755,7 +755,7 @@ void dvi_on(void)
wait_i2c_transfer_finished(); wait_i2c_transfer_finished();
if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK)
continue; goto try_again;
MCF_I2C_I2DR = 0x08; // SUB ADRESS 8 MCF_I2C_I2DR = 0x08; // SUB ADRESS 8
@@ -767,7 +767,7 @@ void dvi_on(void)
wait_i2c_transfer_finished(); wait_i2c_transfer_finished();
if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK)
continue; goto try_again;
MCF_I2C_I2CR &= 0xef; // switch to rx MCF_I2C_I2CR &= 0xef; // switch to rx
dummyByte = MCF_I2C_I2DR; // dummy read dummyByte = MCF_I2C_I2DR; // dummy read
@@ -784,12 +784,17 @@ void dvi_on(void)
MCF_I2C_I2CR = 0x80; // stop MCF_I2C_I2CR = 0x80; // stop
dummyByte = MCF_I2C_I2DR; // dummy read dummyByte = MCF_I2C_I2DR; // dummy read
try_again:
num_tries++; num_tries++;
} while ((receivedByte != 0xbf) && (num_tries < 10)); } while ((receivedByte != 0xbf) && (num_tries < 10));
if (num_tries >= 10) { if (num_tries >= 10)
{
xprintf("FAILED!\r\n"); xprintf("FAILED!\r\n");
} else { }
else
{
xprintf("finished\r\n"); xprintf("finished\r\n");
} }
UNUSED(dummyByte); UNUSED(dummyByte);
@@ -800,7 +805,8 @@ void dvi_on(void)
/* /*
* AC97 * AC97
*/ */
void init_ac97(void) { void init_ac97(void)
{
// PSC2: AC97 ---------- // PSC2: AC97 ----------
int i; int i;
int zm; int zm;

View File

@@ -33,6 +33,7 @@ uint32_t get_timer(void)
{ {
return MCF_SLT_SCNT(0); return MCF_SLT_SCNT(0);
} }
/* /*
* wait for the specified number of us on slice timer 0. Replaces the original routines that had * wait for the specified number of us on slice timer 0. Replaces the original routines that had
* the number of useconds to wait for hardcoded in their name. * the number of useconds to wait for hardcoded in their name.
@@ -52,8 +53,8 @@ void wait_ms(uint32_t ms)
wait(ms * 1000); wait(ms * 1000);
} }
/* /*
* the same as above, with a checker function which gets called while * wait for the specified number of us (same as above), but with a checker function
* busy waiting and allows for an early return if it returns true * which gets called while busy waiting and allows for an early return if it returns true
*/ */
bool waitfor(uint32_t us, checker_func condition) bool waitfor(uint32_t us, checker_func condition)
{ {
@@ -65,5 +66,6 @@ bool waitfor(uint32_t us, checker_func condition)
if ((res = (*condition)())) if ((res = (*condition)()))
return res; return res;
} while (MCF_SLT_SCNT(0) - target > 0); } while (MCF_SLT_SCNT(0) - target > 0);
return false; return false;
} }