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Add support for the M5475EVB Board

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This commit is contained in:
Mark Duckworth
2019-05-16 20:34:29 +00:00
committed by Markus
parent 8001d4ed8b
commit 3446b32a45
18 changed files with 107 additions and 19 deletions
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4
sys/BaS.c
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@@ -252,7 +252,7 @@ void enable_pci_interrupts()
FBEE_INTR_PCI_INTC |
FBEE_INTR_PCI_INTD;
;
#elif defined(MACHINE_M5484LITE)
#elif defined(MACHINE_M5484LITE) || defined(MACHINE_M5475EVB)
/*
* MCF 5484 interrupts are configured at the CPLD for the FireEngine
*/
@@ -281,7 +281,7 @@ void disable_coldfire_interrupts()
NIF nif1;
#if defined(MACHINE_M5484LITE)
#if defined(MACHINE_M5484LITE) || defined(MACHINE_M5475EVB)
/*
* on the MCF 5484 LITEKIT, the second FEC interface is usable
*/

2
sys/driver_mem.c
View File

@@ -22,6 +22,8 @@
#include "firebee.h"
#elif defined(MACHINE_M5484LITE)
#include "m5484l.h"
#elif defined(MACHINE_M5475EVB)
#include "m5475e.h"
#elif defined(MACHINE_M54455)
#include "m54455.h"
#else

2
sys/exceptions.S
View File

@@ -25,6 +25,8 @@
#include "firebee.h"
#elif defined(MACHINE_M5484LITE)
#include "m5484l.h"
#elif defined(MACHINE_M5475EVB)
#include "m5475e.h"
#endif /* MACHINE_FIREBEE */
.extern __SUP_SP

12
sys/mmu.c
View File

@@ -41,6 +41,8 @@
#include "firebee.h"
#elif defined(MACHINE_M5484LITE)
#include "m5484l.h"
#elif defined(MACHINE_M5475EVB)
#include "m5475e.h"
#elif defined(MACHINE_M54455)
#include "m54455.h"
#else
@@ -188,7 +190,7 @@ static struct virt_to_phys translation[] =
{ 0x00f00000, 0x00100000, 0xff000000 }, /* map Falcon I/O area to FPGA */
{ 0x01000000, 0x1f000000, 0x00000000 }, /* map rest of ram virt = phys */
};
#elif defined(MACHINE_M5484LITE)
#elif defined(MACHINE_M5484LITE) || defined(MACHINE_M5475EVB)
static struct virt_to_phys translation[] =
{
/* virtual , length , offset */
@@ -527,7 +529,7 @@ void mmu_init(void)
}
pages[i].locked = 0; /* not locked */
#elif defined(MACHINE_M5484LITE)
#elif defined(MACHINE_M5484LITE) || defined(MACHINE_M5475EVB)
if (addr >= 0x60000000UL && addr < 0x70000000UL) /* Compact Flash on the m5484lite */
{
pages[i].cache_mode = CACHE_NOCACHE_PRECISE;
@@ -631,7 +633,7 @@ void mmu_init(void)
ACR_ADMSK(0x7f) | /* cover 2GB area from 0x80000000 to 0xffffffff */
// ACR_BA(PCI_MEMORY_OFFSET)); /* (equals area from 3 to 4 GB */
ACR_BA(0xe0000000));
#elif defined(MACHINE_M5484LITE)
#elif defined(MACHINE_M5484LITE) || defined(MACHINE_M5475EVB)
ACR_ADMSK(0x7f) | /* cover 2 GB area from 0x80000000 to 0xffffffff */
// ACR_BA(PCI_MEMORY_OFFSET));
ACR_BA(0xe0000000));
@@ -649,7 +651,7 @@ void mmu_init(void)
ACR_CM(0) |
#if defined(MACHINE_FIREBEE)
ACR_CM(ACR_CM_CACHEABLE_WT) |
#elif defined(MACHINE_M5484LITE)
#elif defined(MACHINE_M5484LITE) || defined(MACHINE_M5475EVB)
ACR_CM(ACR_CM_CACHEABLE_WT) |
#elif defined(MACHINE_M54455)
ACR_CM(ACR_CM_CACHEABLE_WT) |
@@ -708,7 +710,7 @@ void mmu_init(void)
flags.execute = 0;
flags.locked = 1;
mmu_map_page(0x00f00000, 0xfff00000, MMU_PAGE_SIZE_1M, 0, &flags);
#elif defined(MACHINE_M5484LITE)
#elif defined(MACHINE_M5484LITE) || defined(MACHINE_M5475EVB)
/*
* Map m5484LITE CPLD access
*/

16
sys/sysinit.c
View File

@@ -41,6 +41,8 @@
#include "firebee.h"
#elif defined(MACHINE_M5484LITE)
#include "m5484l.h"
#elif defined(MACHINE_M5475EVB)
#include "m5475e.h"
#elif defined(MACHINE_M54455)
#include "m54455.h"
#else
@@ -135,7 +137,7 @@ static void init_gpio(void)
MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 |
MCF_PAD_PAR_PCIBG_PAR_PCIBG1_PCIBG1 |
MCF_PAD_PAR_PCIBG_PAR_PCIBG0_PCIBG0;
#elif defined(MACHINE_M5484LITE)
#elif defined(MACHINE_M5484LITE) || defined(MACHINE_M5475EVB)
MCF_PAD_PAR_PCIBG = MCF_PAD_PAR_PCIBG_PAR_PCIBG4_PCIBG4 |
MCF_PAD_PAR_PCIBG_PAR_PCIBG3_PCIBG3 |
MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 |
@@ -157,7 +159,7 @@ static void init_gpio(void)
MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 |
MCF_PAD_PAR_PCIBR_PAR_PCIBR1_PCIBR1 |
MCF_PAD_PAR_PCIBR_PAR_PCIBR0_PCIBR0;
#elif defined(MACHINE_M5484LITE)
#elif defined(MACHINE_M5484LITE) || defined(MACHINE_M5475EVB)
MCF_PAD_PAR_PCIBR = MCF_PAD_PAR_PCIBR_PAR_PCIBR4_PCIBR4 |
MCF_PAD_PAR_PCIBR_PAR_PCIBR3_PCIBR3 |
MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 |
@@ -221,7 +223,7 @@ static void init_serial(void)
MCF_PSC0_PSCSICR = 0; /* PSC control register: select UART mode */
MCF_PSC0_PSCCSR = 0xDD; /* use TX and RX baud rate from PSC timer */
MCF_PSC0_PSCCTUR = 0x00; /* =\ */
#if defined(MACHINE_FIREBEE)
#if defined(MACHINE_FIREBEE) || defined(MACHINE_M5475EVB)
MCF_PSC0_PSCCTLR = 36; /* divide sys_clk by 36 => BAUD RATE = 115200 bps */
#endif
#if defined(MACHINE_M5484LITE)
@@ -339,7 +341,7 @@ static bool init_ddram(void)
MCF_SDRAMC_SDMR = 0x008D0000; /* SDMR (write to LMR) */
MCF_SDRAMC_SDCR = 0x710D0F00; /* SDCR (lock SDMR and enable refresh) */
#elif defined(MACHINE_M5484LITE)
#elif defined(MACHINE_M5484LITE) || defined(MACHINE_M5475EVB)
MCF_SDRAMC_CS0CFG = 0x00000019; /* SDRAM CS0 configuration (64 Mbytes 0000_0000 - 03FF_FFFF) */
MCF_SDRAMC_CS1CFG = 0x00000000; /* SDRAM CS1 configuration - off */
MCF_SDRAMC_CS2CFG = 0x00000000; /* SDRAM CS2 configuration - off */
@@ -462,7 +464,7 @@ static void init_fbcs()
| MCF_FBCS_CSCR_RDAH(1); /* chip errata SECF077 */
MCF_FBCS5_CSMR = MCF_FBCS_CSMR_BAM_1G;
//| MCF_FBCS_CSMR_V;
#elif defined(MACHINE_M5484LITE)
#elif defined(MACHINE_M5484LITE) || defined(MACHINE_M5475EVB)
/* disable other FBCS for now */
MCF_FBCS1_CSMR = 0;
MCF_FBCS2_CSMR = 0;
@@ -996,6 +998,8 @@ void initialize_hardware(void)
"Firebee"
#elif MACHINE_M5484LITE
"m5484 LITEKIT"
#elif MACHINE_M5475EVB
"m5475 EVB"
#else
"unknown platform"
#endif
@@ -1075,7 +1079,7 @@ void initialize_hardware(void)
init_fbcs();
init_ddram();
#if defined(MACHINE_M5484LITE)
#if defined(MACHINE_M5484LITE) || defined(MACHINE_M5475EVB)
dbg("Fire Engine Control register: %02x\r\n", * (uint8_t *) 0x61000000);
dbg("Fire Engine interrupt register: %02x\r\n", * (uint8_t *) 0x62000000);
dbg("Fire Engine interrupt mask register: %02x\r\n", * (uint8_t *) 0x63000000);