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networking works (sort of). For some reason, the Firebee packets don't cross my switch (or only very few of them do). If I put a Linux box in between (cross cable), using it as router, everything works flawlessly.

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This commit is contained in:
Markus Fröschle
2014-01-06 18:44:36 +00:00
parent dd99cdeb96
commit 30ceaacc0f
21 changed files with 447 additions and 411 deletions
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2
BaS_gcc/Makefile
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@@ -33,7 +33,6 @@ INCLUDE=-Iinclude
CFLAGS=-mcpu=5474 \ CFLAGS=-mcpu=5474 \
-Wall \ -Wall \
-Os \ -Os \
-g \
-fomit-frame-pointer \ -fomit-frame-pointer \
-ffreestanding \ -ffreestanding \
-fleading-underscore \ -fleading-underscore \
@@ -41,7 +40,6 @@ CFLAGS=-mcpu=5474 \
CFLAGS_OPTIMIZED = -mcpu=5474 \ CFLAGS_OPTIMIZED = -mcpu=5474 \
-Wall \ -Wall \
-O2 \ -O2 \
-g \
-fomit-frame-pointer \ -fomit-frame-pointer \
-ffreestanding \ -ffreestanding \
-fleading-underscore \ -fleading-underscore \

6
BaS_gcc/dma/dma.c
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@@ -35,7 +35,7 @@
#include "m5484l.h" #include "m5484l.h"
#endif /* MACHINE_FIREBEE */ #endif /* MACHINE_FIREBEE */
#define DBG_DMA //#define DBG_DMA
#ifdef DBG_DMA #ifdef DBG_DMA
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else #else
@@ -552,7 +552,7 @@ void dma_free_channel(int requestor)
*/ */
int dma_interrupt_handler(void *arg1, void *arg2) int dma_interrupt_handler(void *arg1, void *arg2)
{ {
uint32_t i, interrupts; int i, interrupts;
(void) set_ipl(7); (void) set_ipl(7);
@@ -585,7 +585,7 @@ int dma_interrupt_handler(void *arg1, void *arg2)
} }
} }
return 1; return 1; /* handled */
} }
/********************************************************************/ /********************************************************************/

2
BaS_gcc/include/bas_printf.h
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@@ -27,6 +27,8 @@ extern void xvprintf(const char *fmt, va_list va);
extern void xprintf(const char *fmt, ...); extern void xprintf(const char *fmt, ...);
extern void xsnprintf(char *str, size_t size, const char *fmt, ...); extern void xsnprintf(char *str, size_t size, const char *fmt, ...);
extern void xputchar(int c); extern void xputchar(int c);
extern int sprintf(char *str, const char *format, ...);
extern void display_progress(void); extern void display_progress(void);
extern void hexdump(uint8_t buffer[], int size); extern void hexdump(uint8_t buffer[], int size);

2
BaS_gcc/include/nbuf.h
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@@ -25,7 +25,7 @@
* Size of each buffer in bytes * Size of each buffer in bytes
*/ */
#ifndef NBUF_SZ #ifndef NBUF_SZ
#define NBUF_SZ 1520 #define NBUF_SZ 2048
#endif #endif
/* /*

8
BaS_gcc/net/am79c874.c
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@@ -17,7 +17,7 @@
#error "unknown machine" #error "unknown machine"
#endif #endif
#define DBG_AM79 //#define DBG_AM79
#ifdef DBG_AM79 #ifdef DBG_AM79
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else #else
@@ -55,6 +55,7 @@ int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duple
/* Reset the PHY */ /* Reset the PHY */
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_RESET)) if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_RESET))
return 0; return 0;
/* Wait for the PHY to reset */ /* Wait for the PHY to reset */
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++) for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
{ {
@@ -63,7 +64,10 @@ int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duple
break; break;
} }
if (timeout >= FEC_MII_TIMEOUT) if (timeout >= FEC_MII_TIMEOUT)
{
dbg("%s: PHY reset failed\r\n", __FUNCTION__);
return 0; return 0;
};
dbg("%s: PHY reset OK\r\n", __FUNCTION__); dbg("%s: PHY reset OK\r\n", __FUNCTION__);
dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__); dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__);
@@ -107,7 +111,7 @@ int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duple
else else
dbg("%s: Half-duplex\r\n", __FUNCTION__); dbg("%s: Half-duplex\r\n", __FUNCTION__);
dbg("%s:PHY auto-negociation complete\r\n", __FUNCTION__); dbg("%s:PHY auto-negotiation complete\r\n", __FUNCTION__);
#endif /* DBG_AM79 */ #endif /* DBG_AM79 */
return 1; return 1;

37
BaS_gcc/net/fec.c
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@@ -29,7 +29,7 @@
#error Unknown machine! #error Unknown machine!
#endif #endif
#define DBG_FEC //#define DBG_FEC
#ifdef DBG_FEC #ifdef DBG_FEC
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else #else
@@ -96,7 +96,7 @@ int fec_mii_write(uint8_t ch, uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
} }
if(timeout == FEC_MII_TIMEOUT) if(timeout == FEC_MII_TIMEOUT)
return 1; return 0;
/* /*
* Clear the MII interrupt bit * Clear the MII interrupt bit
@@ -108,7 +108,7 @@ int fec_mii_write(uint8_t ch, uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
*/ */
MCF_FEC_EIMR(ch) = eimr; MCF_FEC_EIMR(ch) = eimr;
return 0; return 1;
} }
/* /*
@@ -161,7 +161,7 @@ int fec_mii_read(uint8_t ch, uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
} }
if(timeout == FEC_MII_TIMEOUT) if(timeout == FEC_MII_TIMEOUT)
return 1; return 0;
/* /*
* Clear the MII interrupt bit * Clear the MII interrupt bit
@@ -170,7 +170,7 @@ int fec_mii_read(uint8_t ch, uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
*data = (uint16_t)(MCF_FEC_MMFR(ch) & 0x0000FFFF); *data = (uint16_t)(MCF_FEC_MMFR(ch) & 0x0000FFFF);
return 0; return 1;
} }
/* /*
@@ -481,9 +481,9 @@ void fec_init(uint8_t ch, uint8_t mode, const uint8_t *pa)
*/ */
MCF_FEC_RCR(ch) = 0 MCF_FEC_RCR(ch) = 0
| MCF_FEC_RCR_MAX_FL(ETH_MAX_FRM) | MCF_FEC_RCR_MAX_FL(ETH_MAX_FRM)
#ifdef FEC_PROMISCUOUS //#ifdef FEC_PROMISCUOUS
| MCF_FEC_RCR_PROM | MCF_FEC_RCR_PROM
#endif //#endif
| MCF_FEC_RCR_FCE; | MCF_FEC_RCR_FCE;
if (mode == FEC_MODE_MII) if (mode == FEC_MODE_MII)
@@ -668,6 +668,8 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
NBUF *cur_nbuf, *new_nbuf; NBUF *cur_nbuf, *new_nbuf;
int keep; int keep;
dbg("%s: started\r\n", __FUNCTION__);
while ((pRxBD = fecbd_rx_alloc(ch)) != NULL) while ((pRxBD = fecbd_rx_alloc(ch)) != NULL)
{ {
fec_log[ch].drxf++; fec_log[ch].drxf++;
@@ -778,6 +780,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
*/ */
if (nif_protocol_exist(nif, eth_hdr->type)) if (nif_protocol_exist(nif, eth_hdr->type))
{ {
hexdump((uint8_t *) eth_hdr, ETH_MAX_FRM);
nif_protocol_handler(nif, eth_hdr->type, cur_nbuf); nif_protocol_handler(nif, eth_hdr->type, cur_nbuf);
} }
else else
@@ -989,6 +992,7 @@ void fec_tx_frame(uint8_t ch)
{ {
FECBD *pTxBD; FECBD *pTxBD;
NBUF *pNbuf; NBUF *pNbuf;
bool is_empty = true;
dbg("%s:\r\n", __FUNCTION__); dbg("%s:\r\n", __FUNCTION__);
while ((pTxBD = fecbd_tx_free(ch)) != NULL) while ((pTxBD = fecbd_tx_free(ch)) != NULL)
@@ -1011,10 +1015,11 @@ void fec_tx_frame(uint8_t ch)
*/ */
pTxBD->data = NULL; pTxBD->data = NULL;
pTxBD->length = 0; pTxBD->length = 0;
is_empty = false;
return;
} }
dbg("%s: BD ring is empty\r\n", __FUNCTION__); if (is_empty)
dbg("%s: transmit queue was empty!\r\n", __FUNCTION__);
} }
void fec0_tx_frame(void) void fec0_tx_frame(void)
@@ -1198,7 +1203,7 @@ static void fec_irq_handler(uint8_t ch)
fec_log[ch].rferr++; fec_log[ch].rferr++;
dbg("%s: RFERR\r\n", __FUNCTION__); dbg("%s: RFERR\r\n", __FUNCTION__);
dbg("%s: FECRFSR%d = 0x%08x\r\n", __FUNCTION__, ch, MCF_FEC_FECRFSR(ch)); dbg("%s: FECRFSR%d = 0x%08x\r\n", __FUNCTION__, ch, MCF_FEC_FECRFSR(ch));
fec_eth_stop(ch); //fec_eth_stop(ch);
} }
if (event & MCF_FEC_EIR_XFERR) if (event & MCF_FEC_EIR_XFERR)
@@ -1213,7 +1218,7 @@ static void fec_irq_handler(uint8_t ch)
fec_log[ch].total++; fec_log[ch].total++;
fec_log[ch].xfun++; fec_log[ch].xfun++;
dbg("%s: XFUN\r\n", __FUNCTION__); dbg("%s: XFUN\r\n", __FUNCTION__);
fec_eth_stop(ch); //fec_eth_stop(ch);
} }
if (event & MCF_FEC_EIR_RL) if (event & MCF_FEC_EIR_RL)
@@ -1271,6 +1276,10 @@ static void fec_irq_handler(uint8_t ch)
} }
} }
/*
* handler for FEC interrupts
* arg2 is a pointer to the nif in this case
*/
int fec0_interrupt_handler(void* arg1, void* arg2) int fec0_interrupt_handler(void* arg1, void* arg2)
{ {
(void) arg1; (void) arg1;
@@ -1332,7 +1341,10 @@ void fec_eth_setup(uint8_t ch, uint8_t trcvr, uint8_t speed, uint8_t duplex, con
* Initialize the MII interface * Initialize the MII interface
*/ */
#if defined(MACHINE_FIREBEE) #if defined(MACHINE_FIREBEE)
am79c874_init(0, 0, speed, duplex); if (am79c874_init(0, 0, speed, duplex))
dbg("%s: PHY init completed\r\n", __FUNCTION__);
else
dbg("%s: PHY init failed\r\n", __FUNCTION__);
#elif defined(MACHINE_M548X) #elif defined(MACHINE_M548X)
bcm_5222_init(0, 0, speed, duplex); bcm_5222_init(0, 0, speed, duplex);
#else #else
@@ -1385,6 +1397,7 @@ void fec_eth_stop(uint8_t ch)
*/ */
level = set_ipl(7); level = set_ipl(7);
dbg("%s: fec %d stopped\r\n", __FUNCTION__, ch);
/* /*
* Gracefully disable the receiver and transmitter * Gracefully disable the receiver and transmitter
*/ */

2
BaS_gcc/net/fecbd.c
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@@ -11,7 +11,7 @@
#include "bas_printf.h" #include "bas_printf.h"
#include <stddef.h> #include <stddef.h>
#define DBG_FECBD //#define DBG_FECBD
#ifdef DBG_FECBD #ifdef DBG_FECBD
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else #else

2
BaS_gcc/net/ip.c
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@@ -11,7 +11,7 @@
#include <stddef.h> #include <stddef.h>
#define IP_DEBUG //#define IP_DEBUG
#if defined(IP_DEBUG) #if defined(IP_DEBUG)
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else #else

2
BaS_gcc/net/nbuf.c
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@@ -12,7 +12,7 @@
#include "bas_printf.h" #include "bas_printf.h"
#define DBG_NBUF //#define DBG_NBUF
#if defined(DBG_NBUF) #if defined(DBG_NBUF)
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else #else

2
BaS_gcc/net/net_timer.c
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@@ -12,7 +12,7 @@
#include "MCF5475.h" #include "MCF5475.h"
#include "interrupts.h" #include "interrupts.h"
#define DBG_TMR //#define DBG_TMR
#ifdef DBG_TMR #ifdef DBG_TMR
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else #else

2
BaS_gcc/net/udp.c
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@@ -12,7 +12,7 @@
#include "net.h" #include "net.h"
#include <stddef.h> #include <stddef.h>
#define DBG_UDP //#define DBG_UDP
#if defined(DBG_UDP) #if defined(DBG_UDP)
#define dbg(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg); } while (0) #define dbg(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg); } while (0)
#else #else

4
BaS_gcc/sys/BaS.c
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@@ -49,7 +49,7 @@
#include "interrupts.h" #include "interrupts.h"
#include "exceptions.h" #include "exceptions.h"
#define BAS_DEBUG //#define BAS_DEBUG
#if defined(BAS_DEBUG) #if defined(BAS_DEBUG)
#define dbg(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg); } while (0) #define dbg(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg); } while (0)
#else #else
@@ -251,7 +251,7 @@ static ARP_INFO arp_info;
void network_init(void) void network_init(void)
{ {
uint8_t mac[6] = {0x00, 0x04, 0x9f, 0x01, 0x01, 0x01}; /* this is a Freescale MAC address */ uint8_t mac[6] = {0x00, 0xcf, 0x54, 0x12, 0x34, 0x56};
uint8_t bc[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; /* this is our broadcast MAC address */ uint8_t bc[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; /* this is our broadcast MAC address */
IP_ADDR myip = {192, 168, 1, 100}; IP_ADDR myip = {192, 168, 1, 100};
IP_ADDR gateway = {192, 168, 1, 1}; IP_ADDR gateway = {192, 168, 1, 1};

4
BaS_gcc/sys/driver_mem.c
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@@ -24,9 +24,9 @@
#include "m5484l.h" #include "m5484l.h"
#endif #endif
#define DRIVER_MEM_DEBUG //#define DBG_DM
#ifdef DRIVER_MEM_DEBUG #ifdef DBG_DM
#define dbg(fmt, args...) xprintf(fmt, ##args) #define dbg(fmt, args...) xprintf(fmt, ##args)
#else #else
#define dbg(fmt, args...) #define dbg(fmt, args...)

5
BaS_gcc/sys/exceptions.S
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@@ -332,7 +332,7 @@ std_exc_vec:
move.w 8(sp),d0 // fetch vector move.w 8(sp),d0 // fetch vector
and.l #0x3fc,d0 // mask out vector number and.l #0x3fc,d0 // mask out vector number
#ifdef DBG_EXC
// printout vector number of exception // printout vector number of exception
lea -4 * 4(sp),sp // reserve stack space lea -4 * 4(sp),sp // reserve stack space
@@ -356,7 +356,8 @@ noprint:
movem.l (sp),d0-d1/a0-a1 // restore registers movem.l (sp),d0-d1/a0-a1 // restore registers
lea 4 * 4(sp),sp lea 4 * 4(sp),sp
#endif /* DBG_EXC */
add.l _rt_vbr,d0 // + VBR add.l _rt_vbr,d0 // + VBR
move.l d0,a5 move.l d0,a5
move.l (a5),d0 // fetch exception routine address move.l (a5),d0 // fetch exception routine address

19
BaS_gcc/sys/init_fpga.c
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@@ -85,19 +85,11 @@ void test_byte(void)
void init_fpga(void) void init_fpga(void)
{ {
uint8_t *fpga_data; uint8_t *fpga_data;
volatile int32_t time, start, end;
int i; int i;
/*
xprintf("MCF_FBCS0_CSAR: %08x\r\n", MCF_FBCS0_CSAR);
xprintf("MCF_FBCS0_CSCR: %08x\r\n", MCF_FBCS0_CSCR);
xprintf("MCF_FBCS0_CSMR: %08x\r\n", MCF_FBCS0_CSMR);
*/
xprintf("FPGA load config... "); xprintf("FPGA load config... ");
start = MCF_SLT0_SCNT;
//test_longword();
//test_word();
//test_byte();
MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK; /* FPGA clock => low */ MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK; /* FPGA clock => low */
@@ -157,13 +149,18 @@ void init_fpga(void)
if (fpga_data < fpga_flash_data_end) if (fpga_data < fpga_flash_data_end)
{ {
#ifdef _NOT_USED_
while (fpga_data++ < fpga_flash_data_end) while (fpga_data++ < fpga_flash_data_end)
{ {
/* toggle a little more since it's fun ;) */ /* toggle a little more since it's fun ;) */
MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK; MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK; MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
} }
xprintf("finished\r\n"); #endif /* _NOT_USED_ */
end = MCF_SLT0_SCNT;
time = (start - end) / (SYSCLK / 1000) / 1000;
xprintf("finished (took %f seconds).\r\n", time / 1000.0);
} }
else else
{ {

3
BaS_gcc/sys/interrupts.c
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@@ -211,7 +211,8 @@ bool isr_execute_handler(int vector)
(isrtab[index].type == ISR_DBUG_ISR)) (isrtab[index].type == ISR_DBUG_ISR))
{ {
retval = true; retval = true;
if (isrtab[index].handler(isrtab[index].hdev,isrtab[index].harg))
if (isrtab[index].handler(isrtab[index].hdev, isrtab[index].harg))
{ {
return retval; return retval;
} }

14
BaS_gcc/sys/mmu.c
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@@ -60,11 +60,11 @@
#error "unknown machine!" #error "unknown machine!"
#endif /* MACHINE_FIREBEE */ #endif /* MACHINE_FIREBEE */
#define DEBUG_MMU //#define DEBUG_MMU
#ifdef DEBUG_MMU #ifdef DEBUG_MMU
#define dbg_mmu(format, arg...) do { xprintf("DEBUG: " format, ##arg);} while(0) #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg);} while(0)
#else #else
#define dbg_mmu(format, arg...) do {;} while (0) #define dbg(format, arg...) do {;} while (0)
#endif /* DEBUG_MMU */ #endif /* DEBUG_MMU */
/* /*
@@ -385,7 +385,7 @@ void mmu_init(void)
MCF_MMU_MMUDR_SP | /* supervisor protect */ MCF_MMU_MMUDR_SP | /* supervisor protect */
MCF_MMU_MMUDR_R | /* read access enable */ MCF_MMU_MMUDR_R | /* read access enable */
MCF_MMU_MMUDR_W | /* write access enable */ MCF_MMU_MMUDR_W | /* write access enable */
MCF_MMU_MMUDR_X | /* execute access enable */ //MCF_MMU_MMUDR_X | /* execute access enable */
MCF_MMU_MMUDR_LK; /* lock entry */ MCF_MMU_MMUDR_LK; /* lock entry */
MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */ MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */
MCF_MMU_MMUOR_UAA; /* update allocation address field */ MCF_MMU_MMUOR_UAA; /* update allocation address field */
@@ -396,7 +396,7 @@ void mmu_init(void)
void mmutr_miss(uint32_t address) void mmutr_miss(uint32_t address)
{ {
dbg_mmu("MMU TLB MISS at 0x%08x\r\n", address); dbg("MMU TLB MISS at 0x%08x\r\n", address);
flush_and_invalidate_caches(); flush_and_invalidate_caches();
switch (address) switch (address)
@@ -404,13 +404,13 @@ void mmutr_miss(uint32_t address)
case keyctl: case keyctl:
case keybd: case keybd:
/* do something to emulate the IKBD access */ /* do something to emulate the IKBD access */
dbg_mmu("IKBD access\r\n"); dbg("IKBD access\r\n");
break; break;
case midictl: case midictl:
case midi: case midi:
/* do something to emulate MIDI access */ /* do something to emulate MIDI access */
dbg_mmu("MIDI ACIA access\r\n"); dbg("MIDI ACIA access\r\n");
break; break;
default: default:

16
BaS_gcc/sys/sysinit.c
View File

@@ -284,7 +284,7 @@ void init_serial(void)
/********************************************************************/ /********************************************************************/
/* Initialize DDR DIMMs on the EVB board */ /* Initialize DDR DIMMs on the EVB board */
/********************************************************************/ /********************************************************************/
void init_ddram(void) bool init_ddram(void)
{ {
xprintf("SDRAM controller initialization: "); xprintf("SDRAM controller initialization: ");
@@ -396,11 +396,14 @@ void init_ddram(void)
#endif /* MACHINE_FIREBEE */ #endif /* MACHINE_FIREBEE */
xprintf("finished\r\n"); xprintf("finished\r\n");
return true;
} }
else else
{ {
xprintf("skipped. Already initialized (running from RAM)\r\n"); xprintf("skipped. Already initialized (running from RAM)\r\n");
} }
return false;
} }
/* /*
@@ -936,6 +939,8 @@ void clear_bss_segment(void)
void initialize_hardware(void) void initialize_hardware(void)
{ {
bool coldboot = true;
/* Test for FireTOS switch: DIP switch #5 up */ /* Test for FireTOS switch: DIP switch #5 up */
#ifdef MACHINE_FIREBEE #ifdef MACHINE_FIREBEE
if (!(DIP_SWITCH & (1 << 6))) { if (!(DIP_SWITCH & (1 << 6))) {
@@ -960,7 +965,7 @@ void initialize_hardware(void)
/* Jump into FireTOS */ /* Jump into FireTOS */
typedef void void_func(void); typedef void void_func(void);
void_func* FireTOS = (void_func*)FIRETOS; void_func* FireTOS = (void_func*) FIRETOS;
FireTOS(); // Should never return FireTOS(); // Should never return
return; return;
} }
@@ -1051,7 +1056,7 @@ void initialize_hardware(void)
init_slt(); init_slt();
init_fbcs(); init_fbcs();
init_ddram(); coldboot = init_ddram();
/* /*
* install (preliminary) exception vectors * install (preliminary) exception vectors
@@ -1096,11 +1101,15 @@ void initialize_hardware(void)
} }
#if MACHINE_FIREBEE #if MACHINE_FIREBEE
if (coldboot) /* does not work with BDM */
;
init_fpga(); init_fpga();
init_pll(); init_pll();
init_video_ddr(); init_video_ddr();
dvi_on(); dvi_on();
#ifdef _NOT_USED_
/* experimental */ /* experimental */
{ {
int i; int i;
@@ -1120,6 +1129,7 @@ void initialize_hardware(void)
} }
} }
} }
#endif /* _NOT_USED_ */
#endif /* MACHINE_FIREBEE */ #endif /* MACHINE_FIREBEE */
driver_mem_init(); driver_mem_init();

7
BaS_gcc/x86emu/x86biosemu.c
View File

@@ -301,10 +301,10 @@ void run_bios(struct radeonfb_info *rinfo)
} }
rom_size = (unsigned long) BIOS_IN8((long) &rom_header->size) * 512; rom_size = (unsigned long) BIOS_IN8((long) &rom_header->size) * 512;
if (PCI_CLASS_DISPLAY_VGA == BIOS_IN16((long) &rom_data->class_hi)) if (PCI_CLASS_DISPLAY_VGA == BIOS_IN16((long) &rom_data->class_hi))
{ {
memset((char *) biosmem, 0, SIZE_EMU); memset((char *) biosmem, 0, SIZE_EMU);
setup_system_bios((char *) biosmem); setup_system_bios((char *) biosmem);
dbg("%s: Copying VGA ROM Image from %p to %p (0x%lx bytes)\r\n", dbg("%s: Copying VGA ROM Image from %p to %p (0x%lx bytes)\r\n",
@@ -327,9 +327,8 @@ void run_bios(struct radeonfb_info *rinfo)
} }
else else
{ {
setup_system_bios((char *) biosmem);
memset((char *) biosmem, 0, SIZE_EMU); memset((char *) biosmem, 0, SIZE_EMU);
setup_system_bios((char *) biosmem);
dbg("%s: Copying non-VGA ROM Image from %p to %p (0x%lx bytes)\r\n", __FUNCTION__, dbg("%s: Copying non-VGA ROM Image from %p to %p (0x%lx bytes)\r\n", __FUNCTION__,
(long) rinfo->bios_seg + (long) rom_header, (long) rinfo->bios_seg + (long) rom_header,
@@ -342,6 +341,7 @@ void run_bios(struct radeonfb_info *rinfo)
initialcs = (addr & 0xF0000) >> 4; initialcs = (addr & 0xF0000) >> 4;
initialip = (addr + 3) & 0xFFFF; initialip = (addr + 3) & 0xFFFF;
X86EMU_setMemBase((void *) biosmem, SIZE_EMU); X86EMU_setMemBase((void *) biosmem, SIZE_EMU);
for (i = 0; i < 256; i++) for (i = 0; i < 256; i++)
@@ -381,6 +381,7 @@ void run_bios(struct radeonfb_info *rinfo)
* to it, both kept on the stack, will do. * to it, both kept on the stack, will do.
*/ */
pushw(0xf4f4); /* hlt; hlt */ pushw(0xf4f4); /* hlt; hlt */
// pushw(0x10cd); /* int #0x10 */ // pushw(0x10cd); /* int #0x10 */
// pushw(0x0013); /* 320 x 200 x 256 colors */ // pushw(0x0013); /* 320 x 200 x 256 colors */
// // pushw(0x000F); /* 640 x 350 x mono */ // // pushw(0x000F); /* 640 x 350 x mono */

643
BaS_gcc/x86emu/x86debug.c
View File

@@ -1,44 +1,45 @@
/**************************************************************************** /****************************************************************************
* *
* Realmode X86 Emulator Library * Realmode X86 Emulator Library
* *
* Copyright (C) 1991-2004 SciTech Software, Inc. * Copyright (C) 1991-2004 SciTech Software, Inc.
* Copyright (C) David Mosberger-Tang * Copyright (C) David Mosberger-Tang
* Copyright (C) 1999 Egbert Eich * Copyright (C) 1999 Egbert Eich
* *
* ======================================================================== * ========================================================================
* *
* Permission to use, copy, modify, distribute, and sell this software and * Permission to use, copy, modify, distribute, and sell this software and
* its documentation for any purpose is hereby granted without fee, * its documentation for any purpose is hereby granted without fee,
* provided that the above copyright notice appear in all copies and that * provided that the above copyright notice appear in all copies and that
* both that copyright notice and this permission notice appear in * both that copyright notice and this permission notice appear in
* supporting documentation, and that the name of the authors not be used * supporting documentation, and that the name of the authors not be used
* in advertising or publicity pertaining to distribution of the software * in advertising or publicity pertaining to distribution of the software
* without specific, written prior permission. The authors makes no * without specific, written prior permission. The authors makes no
* representations about the suitability of this software for any purpose. * representations about the suitability of this software for any purpose.
* It is provided "as is" without express or implied warranty. * It is provided "as is" without express or implied warranty.
* *
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE. * PERFORMANCE OF THIS SOFTWARE.
* *
* ======================================================================== * ========================================================================
* *
* Language: ANSI C * Language: ANSI C
* Environment: Any * Environment: Any
* Developer: Kendall Bennett * Developer: Kendall Bennett
* *
* Description: This file contains the code to handle debugging of the * Description: This file contains the code to handle debugging of the
* emulator. * emulator.
* *
****************************************************************************/ ****************************************************************************/
#include "bas_types.h" #include "bas_types.h"
#include "bas_printf.h" #include "bas_printf.h"
#include "bas_string.h"
#include "x86debug.h" #include "x86debug.h"
#include "x86emui.h" #include "x86emui.h"
@@ -53,96 +54,95 @@ static void print_decoded_instruction (void);
/* should look something like debug's output. */ /* should look something like debug's output. */
void X86EMU_trace_regs (void) void X86EMU_trace_regs (void)
{ {
if (DEBUG_TRACE()) { if (DEBUG_TRACE()) {
x86emu_dump_regs(); x86emu_dump_regs();
} }
if (DEBUG_DECODE() && ! DEBUG_DECODE_NOPRINT()) { if (DEBUG_DECODE() && !DEBUG_DECODE_NOPRINT())
dbg("0x%x", M.x86.saved_cs); {
dbg(":0x%x", M.x86.saved_ip); xprintf("%04x:%04x ", M.x86.saved_cs, M.x86.saved_ip);
dbg(" "); print_encoded_bytes(M.x86.saved_cs, M.x86.saved_ip);
print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip); print_decoded_instruction();
print_decoded_instruction(); }
}
} }
void X86EMU_trace_xregs (void) void X86EMU_trace_xregs (void)
{ {
if (DEBUG_TRACE()) { if (DEBUG_TRACE()) {
x86emu_dump_xregs(); x86emu_dump_xregs();
} }
} }
void x86emu_just_disassemble (void) void x86emu_just_disassemble (void)
{ {
/* /*
* This routine called if the flag DEBUG_DISASSEMBLE is set kind * This routine called if the flag DEBUG_DISASSEMBLE is set kind
* of a hack! * of a hack!
*/ */
dbg("%x:%x ", M.x86.saved_cs, M.x86.saved_ip); xprintf("%x:%x ", M.x86.saved_cs, M.x86.saved_ip);
print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip); print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip);
print_decoded_instruction(); print_decoded_instruction();
} }
#if 0 #if 0
static void disassemble_forward (uint16_t seg, uint16_t off, int n) static void disassemble_forward (uint16_t seg, uint16_t off, int n)
{ {
X86EMU_sysEnv tregs; X86EMU_sysEnv tregs;
int i; int i;
u8 op1; u8 op1;
/* /*
* hack, hack, hack. What we do is use the exact machinery set up * hack, hack, hack. What we do is use the exact machinery set up
* for execution, except that now there is an additional state * for execution, except that now there is an additional state
* flag associated with the "execution", and we are using a copy * flag associated with the "execution", and we are using a copy
* of the register struct. All the major opcodes, once fully * of the register struct. All the major opcodes, once fully
* decoded, have the following two steps: TRACE_REGS(r,m); * decoded, have the following two steps: TRACE_REGS(r,m);
* SINGLE_STEP(r,m); which disappear if DEBUG is not defined to * SINGLE_STEP(r,m); which disappear if DEBUG is not defined to
* the preprocessor. The TRACE_REGS macro expands to: * the preprocessor. The TRACE_REGS macro expands to:
* *
* if (debug&DEBUG_DISASSEMBLE) * if (debug&DEBUG_DISASSEMBLE)
* {just_disassemble(); goto EndOfInstruction;} * {just_disassemble(); goto EndOfInstruction;}
* if (debug&DEBUG_TRACE) trace_regs(r,m); * if (debug&DEBUG_TRACE) trace_regs(r,m);
* *
* ...... and at the last line of the routine. * ...... and at the last line of the routine.
* *
* EndOfInstruction: end_instr(); * EndOfInstruction: end_instr();
* *
* Up to the point where TRACE_REG is expanded, NO modifications * Up to the point where TRACE_REG is expanded, NO modifications
* are done to any register EXCEPT the IP register, for fetch and * are done to any register EXCEPT the IP register, for fetch and
* decoding purposes. * decoding purposes.
* *
* This was done for an entirely different reason, but makes a * This was done for an entirely different reason, but makes a
* nice way to get the system to help debug codes. * nice way to get the system to help debug codes.
*/ */
tregs = M; tregs = M;
tregs.x86.R_IP = off; tregs.x86.R_IP = off;
tregs.x86.R_CS = seg; tregs.x86.R_CS = seg;
/* reset the decoding buffers */ /* reset the decoding buffers */
tregs.x86.enc_str_pos = 0; tregs.x86.enc_str_pos = 0;
tregs.x86.enc_pos = 0; tregs.x86.enc_pos = 0;
/* turn on the "disassemble only, no execute" flag */ /* turn on the "disassemble only, no execute" flag */
tregs.x86.debug |= DEBUG_DISASSEMBLE_F; tregs.x86.debug |= DEBUG_DISASSEMBLE_F;
/* DUMP NEXT n instructions to screen in straight_line fashion */ /* DUMP NEXT n instructions to screen in straight_line fashion */
/* /*
* This looks like the regular instruction fetch stream, except * This looks like the regular instruction fetch stream, except
* that when this occurs, each fetched opcode, upon seeing the * that when this occurs, each fetched opcode, upon seeing the
* DEBUG_DISASSEMBLE flag set, exits immediately after decoding * DEBUG_DISASSEMBLE flag set, exits immediately after decoding
* the instruction. XXX --- CHECK THAT MEM IS NOT AFFECTED!!! * the instruction. XXX --- CHECK THAT MEM IS NOT AFFECTED!!!
* Note the use of a copy of the register structure... * Note the use of a copy of the register structure...
*/ */
for (i=0; i<n; i++) { for (i=0; i<n; i++) {
op1 = (*sys_rdb)(((uint32_t)M.x86.R_CS<<4) + (M.x86.R_IP++)); op1 = (*sys_rdb)(((uint32_t)M.x86.R_CS<<4) + (M.x86.R_IP++));
(x86emu_optab[op1])(op1); (x86emu_optab[op1])(op1);
} }
/* end major hack mode. */ /* end major hack mode. */
} }
#endif #endif
void x86emu_check_ip_access (void) void x86emu_check_ip_access (void)
{ {
/* NULL as of now */ /* NULL as of now */
} }
void x86emu_check_sp_access (void) void x86emu_check_sp_access (void)
@@ -151,12 +151,12 @@ void x86emu_check_sp_access (void)
void x86emu_check_mem_access(uint32_t dummy) void x86emu_check_mem_access(uint32_t dummy)
{ {
/* check bounds, etc */ /* check bounds, etc */
} }
void x86emu_check_data_access(unsigned int dummy1, unsigned int dummy2) void x86emu_check_data_access(unsigned int dummy1, unsigned int dummy2)
{ {
/* check bounds, etc */ /* check bounds, etc */
} }
void x86emu_inc_decoded_inst_len(int x) void x86emu_inc_decoded_inst_len(int x)
@@ -166,178 +166,178 @@ void x86emu_inc_decoded_inst_len(int x)
void x86emu_decode_printf(char *x) void x86emu_decode_printf(char *x)
{ {
#ifdef DBG_X86EMU sprintf(M.x86.decoded_buf + M.x86.enc_str_pos, "%s", x);
strcpy(x, &M.x86.decoded_buf[M.x86.enc_str_pos & 127]);
M.x86.enc_str_pos += strlen(x); M.x86.enc_str_pos += strlen(x);
#endif
} }
void x86emu_decode_printf2(char *x, int y) void x86emu_decode_printf2(char *x, int y)
{ {
char temp[100], *p; char temp[100];
#ifdef DBG_X86EMU
sprintf(temp, x, y); sprintf(temp, x, y);
strcpy(temp, &M.x86.decoded_buf[M.x86.enc_str_pos & 127]); sprintf(M.x86.decoded_buf + M.x86.enc_str_pos, "%s", temp);
M.x86.enc_str_pos += strlen(temp); M.x86.enc_str_pos += strlen(temp);
#endif
} }
void x86emu_end_instr(void) void x86emu_end_instr(void)
{ {
M.x86.enc_str_pos = 0; M.x86.enc_str_pos = 0;
M.x86.enc_pos = 0; M.x86.enc_pos = 0;
} }
static void print_encoded_bytes (uint16_t s, uint16_t o) static void print_encoded_bytes (uint16_t s, uint16_t o)
{ {
int i; int i;
for (i = 0; i < M.x86.enc_pos; i++) char buf1[64];
dbg("%x", fetch_data_byte_abs(s,o+i));
for ( ; i < 10; i++) for (i = 0; i < M.x86.enc_pos; i++)
dbg(" "); {
sprintf(buf1 + 2 * i, "%02x", fetch_data_byte_abs(s, o + i));
}
xprintf("%-20s", buf1);
} }
static void print_decoded_instruction (void) static void print_decoded_instruction (void)
{ {
dbg("%s", M.x86.decoded_buf); xprintf("%s", M.x86.decoded_buf);
} }
void x86emu_print_int_vect (uint16_t iv) void x86emu_print_int_vect(uint16_t iv)
{ {
uint16_t seg,off; uint16_t seg,off;
if (iv > 256) return; if (iv > 256)
seg = fetch_data_word_abs(0,iv*4); return;
off = fetch_data_word_abs(0,iv*4+2);
dbg("%x:%x", seg, off); seg = fetch_data_word_abs(0, iv * 4);
dbg(" "); off = fetch_data_word_abs(0, iv *4 + 2);
xprintf("%04x:%04x", seg, off);
} }
void X86EMU_dump_memory (uint16_t seg, uint16_t off, uint32_t amt) void X86EMU_dump_memory (uint16_t seg, uint16_t off, uint32_t amt)
{ {
uint32_t start = off & 0xfffffff0; uint32_t start = off & 0xfffffff0;
uint32_t end = (off+16) & 0xfffffff0; uint32_t end = (off + 16) & 0xfffffff0;
uint32_t i; uint32_t i;
uint32_t current; uint32_t current;
current = start; current = start;
while (end <= off + amt) { while (end <= off + amt) {
dbg("%x:%x: ", seg, start); xprintf("%04x:%04x ", seg, start);
dbg(" ");
for (i = start; i < off; i++) for (i = start; i < off; i++)
dbg(" "); xprintf(" ");
for ( ; i< end; i++) for ( ; i< end; i++)
dbg(" %x\r\n", fetch_data_byte_abs(seg,i)); xprintf("%02x", fetch_data_byte_abs(seg, i));
start = end; xprintf("\r\n");
end = start + 16; start = end;
} end = start + 16;
}
} }
void x86emu_single_step (void) void x86emu_single_step (void)
{ {
#if 0 #if 0
char s[1024]; char s[1024];
int ps[10]; int ps[10];
int ntok; int ntok;
int cmd; int cmd;
int done; int done;
int segment; int segment;
int offset; int offset;
static int breakpoint; static int breakpoint;
static int noDecode = 1; static int noDecode = 1;
char *p; char *p;
if (DEBUG_BREAK()) { if (DEBUG_BREAK()) {
if (M.x86.saved_ip != breakpoint) { if (M.x86.saved_ip != breakpoint) {
return; return;
} else { } else {
M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F; M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
M.x86.debug |= DEBUG_TRACE_F; M.x86.debug |= DEBUG_TRACE_F;
M.x86.debug &= ~DEBUG_BREAK_F; M.x86.debug &= ~DEBUG_BREAK_F;
print_decoded_instruction (); print_decoded_instruction ();
X86EMU_trace_regs(); X86EMU_trace_regs();
} }
} }
done=0; done=0;
offset = M.x86.saved_ip; offset = M.x86.saved_ip;
while (!done) { while (!done) {
DPRINT("-"); DPRINT("-");
p = fgets(s, 1023, stdin); p = fgets(s, 1023, stdin);
cmd = parse_line(s, ps, &ntok); cmd = parse_line(s, ps, &ntok);
switch(cmd) { switch(cmd) {
case 'u': case 'u':
disassemble_forward(M.x86.saved_cs,(uint16_t)offset,10); disassemble_forward(M.x86.saved_cs,(uint16_t)offset,10);
break; break;
case 'd': case 'd':
if (ntok == 2) { if (ntok == 2) {
segment = M.x86.saved_cs; segment = M.x86.saved_cs;
offset = ps[1]; offset = ps[1];
X86EMU_dump_memory(segment,(uint16_t)offset,16); X86EMU_dump_memory(segment,(uint16_t)offset,16);
offset += 16; offset += 16;
} else if (ntok == 3) { } else if (ntok == 3) {
segment = ps[1]; segment = ps[1];
offset = ps[2]; offset = ps[2];
X86EMU_dump_memory(segment,(uint16_t)offset,16); X86EMU_dump_memory(segment,(uint16_t)offset,16);
offset += 16; offset += 16;
} else { } else {
segment = M.x86.saved_cs; segment = M.x86.saved_cs;
X86EMU_dump_memory(segment,(uint16_t)offset,16); X86EMU_dump_memory(segment,(uint16_t)offset,16);
offset += 16; offset += 16;
} }
break; break;
case 'c': case 'c':
M.x86.debug ^= DEBUG_TRACECALL_F; M.x86.debug ^= DEBUG_TRACECALL_F;
break; break;
case 's': case 's':
M.x86.debug ^= DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F; M.x86.debug ^= DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F;
break; break;
case 'r': case 'r':
X86EMU_trace_regs(); X86EMU_trace_regs();
break; break;
case 'x': case 'x':
X86EMU_trace_xregs(); X86EMU_trace_xregs();
break; break;
case 'g': case 'g':
if (ntok == 2) { if (ntok == 2) {
breakpoint = ps[1]; breakpoint = ps[1];
if (noDecode) { if (noDecode) {
M.x86.debug |= DEBUG_DECODE_NOPRINT_F; M.x86.debug |= DEBUG_DECODE_NOPRINT_F;
} else { } else {
M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F; M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
} }
M.x86.debug &= ~DEBUG_TRACE_F; M.x86.debug &= ~DEBUG_TRACE_F;
M.x86.debug |= DEBUG_BREAK_F; M.x86.debug |= DEBUG_BREAK_F;
done = 1; done = 1;
} }
break; break;
case 'q': case 'q':
M.x86.debug |= DEBUG_EXIT; M.x86.debug |= DEBUG_EXIT;
return; return;
case 'P': case 'P':
noDecode = (noDecode)?0:1; noDecode = (noDecode)?0:1;
DPRINT("Toggled decoding to "); DPRINT("Toggled decoding to ");
DPRINT((noDecode)?"FALSE":"TRUE"); DPRINT((noDecode)?"FALSE":"TRUE");
DPRINT("\r\n"); DPRINT("\r\n");
break; break;
case 't': case 't':
case 0: case 0:
done = 1; done = 1;
break; break;
} }
} }
#endif #endif
} }
int X86EMU_trace_on(void) int X86EMU_trace_on(void)
{ {
return M.x86.debug |= DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F; return M.x86.debug |= DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F;
} }
int X86EMU_trace_off(void) int X86EMU_trace_off(void)
{ {
return M.x86.debug &= ~(DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F); return M.x86.debug &= ~(DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F);
} }
int X86EMU_set_debug(int debug) int X86EMU_set_debug(int debug)
@@ -348,105 +348,104 @@ int X86EMU_set_debug(int debug)
#if 0 #if 0
static int parse_line (char *s, int *ps, int *n) static int parse_line (char *s, int *ps, int *n)
{ {
int cmd; int cmd;
*n = 0; *n = 0;
while (*s == ' ' || *s == '\t') s++; while (*s == ' ' || *s == '\t') s++;
ps[*n] = *s; ps[*n] = *s;
switch (*s) { switch (*s) {
case '\n': case '\n':
*n += 1; *n += 1;
return 0; return 0;
default: default:
cmd = *s; cmd = *s;
*n += 1; *n += 1;
} }
while (1) { while (1) {
while (*s != ' ' && *s != '\t' && *s != '\n') s++; while (*s != ' ' && *s != '\t' && *s != '\n') s++;
if (*s == '\n') if (*s == '\n')
return cmd; return cmd;
while (*s == ' ' || *s == '\t') s++; while (*s == ' ' || *s == '\t') s++;
sscanf(s,"%x",&ps[*n]); sscanf(s,"%x",&ps[*n]);
*n += 1; *n += 1;
} }
} }
#endif #endif
#endif /* DEBUG */ #endif /* DBG_X86EMU */
void x86emu_dump_regs (void) void x86emu_dump_regs (void)
{ {
dbg(" AX=%x", M.x86.R_AX ); xprintf("\tAX=%04x", M.x86.R_AX);
dbg(" BX=%x", M.x86.R_BX ); xprintf(" BX=%04x", M.x86.R_BX);
dbg(" CX=%x", M.x86.R_CX ); xprintf(" CX=%04x", M.x86.R_CX);
dbg(" DX=%x", M.x86.R_DX ); xprintf(" DX=%04x", M.x86.R_DX);
dbg(" SP=%x", M.x86.R_SP ); xprintf(" SP=%04x", M.x86.R_SP);
dbg(" BP=%x", M.x86.R_BP ); xprintf(" BP=%04x", M.x86.R_BP);
dbg(" SI=%x", M.x86.R_SI ); xprintf(" SI=%04x", M.x86.R_SI);
dbg(" DI=%x", M.x86.R_DI ); xprintf(" DI=%04x", M.x86.R_DI);
dbg("\r\n"); xprintf("\r\n");
dbg(" DS=%x", M.x86.R_DS ); xprintf("\tDS=%04x", M.x86.R_DS);
dbg(" ES=%x", M.x86.R_ES ); xprintf(" ES=%04x", M.x86.R_ES);
dbg(" SS=%x", M.x86.R_SS ); xprintf(" SS=%04x", M.x86.R_SS);
dbg(" CS=%x", M.x86.R_CS ); xprintf(" CS=%04x", M.x86.R_CS);
dbg(" IP=%x", M.x86.R_IP ); xprintf(" IP=%04x", M.x86.R_IP);
dbg("\r\n "); if (ACCESS_FLAG(F_OF)) xprintf("OV "); /* CHECKED... */
if (ACCESS_FLAG(F_OF)) dbg("OV "); /* CHECKED... */ else xprintf("NV ");
else dbg("NV "); if (ACCESS_FLAG(F_DF)) xprintf("DN ");
if (ACCESS_FLAG(F_DF)) dbg("DN "); else xprintf("UP ");
else dbg("UP "); if (ACCESS_FLAG(F_IF)) xprintf("EI ");
if (ACCESS_FLAG(F_IF)) dbg("EI "); else xprintf("DI ");
else dbg("DI "); if (ACCESS_FLAG(F_SF)) xprintf("NG ");
if (ACCESS_FLAG(F_SF)) dbg("NG "); else xprintf("PL ");
else dbg("PL "); if (ACCESS_FLAG(F_ZF)) xprintf("ZR ");
if (ACCESS_FLAG(F_ZF)) dbg("ZR "); else xprintf("NZ ");
else dbg("NZ "); if (ACCESS_FLAG(F_AF)) xprintf("AC ");
if (ACCESS_FLAG(F_AF)) dbg("AC "); else xprintf("NA ");
else dbg("NA "); if (ACCESS_FLAG(F_PF)) xprintf("PE ");
if (ACCESS_FLAG(F_PF)) dbg("PE "); else xprintf("PO ");
else dbg("PO "); if (ACCESS_FLAG(F_CF)) xprintf("CY ");
if (ACCESS_FLAG(F_CF)) dbg("CY "); else xprintf("NC ");
else dbg("NC "); xprintf("\r\n");
dbg("\r\n");
} }
void x86emu_dump_xregs (void) void x86emu_dump_xregs (void)
{ {
dbg(" EAX=%x", M.x86.R_EAX ); xprintf(" EAX=%08x", M.x86.R_EAX );
dbg(" EBX=%x", M.x86.R_EBX ); xprintf(" EBX=%08x", M.x86.R_EBX );
dbg(" ECX=%x", M.x86.R_ECX ); xprintf(" ECX=%08x", M.x86.R_ECX );
dbg(" EDX=%x", M.x86.R_EDX ); xprintf(" EDX=%08x", M.x86.R_EDX );
dbg("\r\n"); xprintf("\r\n");
dbg(" ESP=%x", M.x86.R_ESP ); xprintf(" ESP=%08x", M.x86.R_ESP );
dbg(" EBP=%x", M.x86.R_EBP ); xprintf(" EBP=%08x", M.x86.R_EBP );
dbg(" ESI=%x", M.x86.R_ESI ); xprintf(" ESI=%08x", M.x86.R_ESI );
dbg(" EDI=%x", M.x86.R_EDI ); xprintf(" EDI=%08x", M.x86.R_EDI );
dbg("\r\n"); xprintf("\r\n");
dbg(" DS=%x", M.x86.R_DS ); xprintf(" DS=%08x", M.x86.R_DS );
dbg(" ES=%x", M.x86.R_ES ); xprintf(" ES=%08x", M.x86.R_ES );
dbg(" SS=%x", M.x86.R_SS ); xprintf(" SS=%08x", M.x86.R_SS );
dbg(" CS=%x", M.x86.R_CS ); xprintf(" CS=%08x", M.x86.R_CS );
dbg(" EIP%x=", M.x86.R_EIP ); xprintf(" EIP%08x=", M.x86.R_EIP );
dbg("\r\n "); xprintf("\r\n\t");
if (ACCESS_FLAG(F_OF)) dbg("OV "); /* CHECKED... */ if (ACCESS_FLAG(F_OF)) xprintf("OV "); /* CHECKED... */
else dbg("NV "); else xprintf("NV ");
if (ACCESS_FLAG(F_DF)) dbg("DN "); if (ACCESS_FLAG(F_DF)) xprintf("DN ");
else dbg("UP "); else xprintf("UP ");
if (ACCESS_FLAG(F_IF)) dbg("EI "); if (ACCESS_FLAG(F_IF)) xprintf("EI ");
else dbg("DI "); else xprintf("DI ");
if (ACCESS_FLAG(F_SF)) dbg("NG "); if (ACCESS_FLAG(F_SF)) xprintf("NG ");
else dbg("PL "); else xprintf("PL ");
if (ACCESS_FLAG(F_ZF)) dbg("ZR "); if (ACCESS_FLAG(F_ZF)) xprintf("ZR ");
else dbg("NZ "); else xprintf("NZ ");
if (ACCESS_FLAG(F_AF)) dbg("AC "); if (ACCESS_FLAG(F_AF)) xprintf("AC ");
else dbg("NA "); else xprintf("NA ");
if (ACCESS_FLAG(F_PF)) dbg("PE "); if (ACCESS_FLAG(F_PF)) xprintf("PE ");
else dbg("PO "); else xprintf("PO ");
if (ACCESS_FLAG(F_CF)) dbg("CY "); if (ACCESS_FLAG(F_CF)) xprintf("CY ");
else dbg("NC "); else xprintf("NC ");
dbg("\r\n"); xprintf("\r\n");
} }

76
BaS_gcc/x86emu/x86ops.c
View File

@@ -169,21 +169,20 @@ static char *opF6_names[8] =
#endif #endif
/**************************************************************************** /*
PARAMETERS: * PARAMETERS:
op1 - Instruction op code * op1 - Instruction op code
*
REMARKS: * REMARKS:
Handles illegal opcodes. * Handles illegal opcodes.
****************************************************************************/ */
void x86emuOp_illegal_op( void x86emuOp_illegal_op(uint8_t op1)
uint8_t op1)
{ {
START_OF_INSTR(); START_OF_INSTR();
if (M.x86.R_SP != 0) { if (M.x86.R_SP != 0) {
DECODE_PRINTF("ILLEGAL X86 OPCODE\r\n"); DECODE_PRINTF("ILLEGAL X86 OPCODE\r\n");
TRACE_REGS(); TRACE_REGS();
dbg("%x:%x: %x\r\n", M.x86.R_CS, M.x86.R_IP - 1, op1); dbg("%04x:%04x: %02X ILLEGAL X86 OPCODE!\r\n", M.x86.R_CS, M.x86.R_IP - 1, op1);
dbg(" ILLEGAL X86 OPCODE!\r\n"); dbg(" ILLEGAL X86 OPCODE!\r\n");
HALT_SYS(); HALT_SYS();
} }
@@ -199,10 +198,10 @@ void x86emuOp_illegal_op(
END_OF_INSTR(); END_OF_INSTR();
} }
/**************************************************************************** /*
REMARKS: * REMARKS:
Handles opcodes 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38 * Handles opcodes 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38
****************************************************************************/ */
void x86emuOp_genop_byte_RM_R(uint8_t op1) void x86emuOp_genop_byte_RM_R(uint8_t op1)
{ {
int mod, rl, rh; int mod, rl, rh;
@@ -216,19 +215,21 @@ void x86emuOp_genop_byte_RM_R(uint8_t op1)
DECODE_PRINTF(x86emu_GenOpName[op1]); DECODE_PRINTF(x86emu_GenOpName[op1]);
DECODE_PRINTF("\t"); DECODE_PRINTF("\t");
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
if(mod<3) if (mod < 3)
{ destoffset = decode_rmXX_address(mod,rl); {
destoffset = decode_rmXX_address(mod, rl);
DECODE_PRINTF(","); DECODE_PRINTF(",");
destval = fetch_data_byte(destoffset); destval = fetch_data_byte(destoffset);
srcreg = DECODE_RM_BYTE_REGISTER(rh); srcreg = DECODE_RM_BYTE_REGISTER(rh);
DECODE_PRINTF("\r\n"); DECODE_PRINTF("\r\n");
TRACE_AND_STEP(); TRACE_AND_STEP();
destval = genop_byte_operation[op1](destval, *srcreg); destval = genop_byte_operation[op1](destval, *srcreg);
if (op1 != 7) store_data_byte(destoffset, destval);
store_data_byte(destoffset, destval);
} }
else else
{ /* register to register */ {
/* register to register */
destreg = DECODE_RM_BYTE_REGISTER(rl); destreg = DECODE_RM_BYTE_REGISTER(rl);
DECODE_PRINTF(","); DECODE_PRINTF(",");
srcreg = DECODE_RM_BYTE_REGISTER(rh); srcreg = DECODE_RM_BYTE_REGISTER(rh);
@@ -240,10 +241,10 @@ void x86emuOp_genop_byte_RM_R(uint8_t op1)
END_OF_INSTR(); END_OF_INSTR();
} }
/**************************************************************************** /*
REMARKS: * REMARKS:
Handles opcodes 0x01, 0x09, 0x11, 0x19, 0x21, 0x29, 0x31, 0x39 * Handles opcodes 0x01, 0x09, 0x11, 0x19, 0x21, 0x29, 0x31, 0x39
****************************************************************************/ */
void x86emuOp_genop_word_RM_R(uint8_t op1) void x86emuOp_genop_word_RM_R(uint8_t op1)
{ {
int mod, rl, rh; int mod, rl, rh;
@@ -256,9 +257,11 @@ void x86emuOp_genop_word_RM_R(uint8_t op1)
DECODE_PRINTF("\t"); DECODE_PRINTF("\t");
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
if(mod<3) { if (mod < 3)
{
destoffset = decode_rmXX_address(mod,rl); destoffset = decode_rmXX_address(mod,rl);
if (M.x86.mode & SYSMODE_PREFIX_DATA) { if (M.x86.mode & SYSMODE_PREFIX_DATA)
{
uint32_t destval; uint32_t destval;
uint32_t *srcreg; uint32_t *srcreg;
@@ -270,7 +273,9 @@ void x86emuOp_genop_word_RM_R(uint8_t op1)
destval = genop_long_operation[op1](destval, *srcreg); destval = genop_long_operation[op1](destval, *srcreg);
if (op1 != 7) if (op1 != 7)
store_data_long(destoffset, destval); store_data_long(destoffset, destval);
} else { }
else
{
uint16_t destval; uint16_t destval;
uint16_t *srcreg; uint16_t *srcreg;
@@ -283,8 +288,11 @@ void x86emuOp_genop_word_RM_R(uint8_t op1)
if (op1 != 7) if (op1 != 7)
store_data_word(destoffset, destval); store_data_word(destoffset, destval);
} }
} else { /* register to register */ }
if (M.x86.mode & SYSMODE_PREFIX_DATA) { else
{ /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA)
{
uint32_t *destreg, *srcreg; uint32_t *destreg, *srcreg;
destreg = DECODE_RM_LONG_REGISTER(rl); destreg = DECODE_RM_LONG_REGISTER(rl);
@@ -293,7 +301,9 @@ void x86emuOp_genop_word_RM_R(uint8_t op1)
DECODE_PRINTF("\r\n"); DECODE_PRINTF("\r\n");
TRACE_AND_STEP(); TRACE_AND_STEP();
*destreg = genop_long_operation[op1](*destreg, *srcreg); *destreg = genop_long_operation[op1](*destreg, *srcreg);
} else { }
else
{
uint16_t *destreg, *srcreg; uint16_t *destreg, *srcreg;
destreg = DECODE_RM_WORD_REGISTER(rl); destreg = DECODE_RM_WORD_REGISTER(rl);
@@ -308,10 +318,10 @@ void x86emuOp_genop_word_RM_R(uint8_t op1)
END_OF_INSTR(); END_OF_INSTR();
} }
/**************************************************************************** /*
REMARKS: * REMARKS:
Handles opcodes 0x02, 0x0a, 0x12, 0x1a, 0x22, 0x2a, 0x32, 0x3a * Handles opcodes 0x02, 0x0a, 0x12, 0x1a, 0x22, 0x2a, 0x32, 0x3a
****************************************************************************/ */
void x86emuOp_genop_byte_R_RM(uint8_t op1) void x86emuOp_genop_byte_R_RM(uint8_t op1)
{ {
int mod, rl, rh; int mod, rl, rh;