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implemented PHY, but still only occasionly transmitted packets. Obviously, there's a bug somewhere ;)

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Markus Fröschle
2014-01-02 21:33:27 +00:00
parent 4017a336a9
commit 3034ede3a6
14 changed files with 396 additions and 211 deletions
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4
pci/pci.c
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@@ -892,9 +892,9 @@ void init_xlbus_arbiter(void)
MCF_XLB_XARB_PRIEN = MCF_XLB_XARB_PRIEN_M0 | /* activate programmed priority for Coldfire core */
MCF_XLB_XARB_PRIEN_M2 | /* activate programmed priority for Multichannel DMA */
MCF_XLB_XARB_PRIEN_M3; /* activate programmed priority for PCI target interface */
MCF_XLB_XARB_PRI = MCF_XLB_XARB_PRI_M0P(7) | /* Coldfire core gets lowest */
MCF_XLB_XARB_PRI = MCF_XLB_XARB_PRI_M0P(3) | /* Coldfire core gets lowest */
MCF_XLB_XARB_PRI_M2P(5) | /* Multichannel DMA mid priority */
MCF_XLB_XARB_PRI_M3P(3); /* PCI target interface is highest priority */
MCF_XLB_XARB_PRI_M3P(7); /* PCI target interface is highest priority */
}
void init_pci(void)