Firebee/BaS_gcc
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

implemented PHY, but still only occasionly transmitted packets. Obviously, there's a bug somewhere ;)

Browse Source
This commit is contained in:
Markus Fröschle
2014-01-02 21:33:27 +00:00
parent 4017a336a9
commit 3034ede3a6
14 changed files with 396 additions and 211 deletions
Download Patch File Download Diff File Expand all files Collapse all files

114
net/am79c874.c Normal file
View File

@@ -0,0 +1,114 @@
/*
* File: am79c874.c
* Purpose: Driver for the AMD AM79C874 10/100 Ethernet PHY
*/
#include "net.h"
#include "fec.h"
#include "am79c874.h"
#include "bas_printf.h"
#if defined(MACHINE_FIREBEE)
#include "firebee.h"
#elif defined(MACHINE_M5484LITE)
#include "m5484l.h"
#else
#error "unknown machine"
#endif
#define DBG_AM79
#ifdef DBG_AM79
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_AM79 */
/********************************************************************/
/* Initialize the AM79C874 PHY
*
* This function sets up the Auto-Negotiate Advertisement register
* within the PHY and then forces the PHY to auto-negotiate for
* it's settings.
*
* Params:
* fec_ch FEC channel
* phy_addr Address of the PHY.
* speed Desired speed (10BaseT or 100BaseTX)
* duplex Desired duplex (Full or Half)
*
* Return Value:
* 0 if MII commands fail
* 1 otherwise
*/
int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex)
{
int timeout;
uint16_t settings;
if (speed); /* to do */
if (duplex); /* to do */
/* Initialize the MII interface */
fec_mii_init(fec_ch, SYSCLK);
dbg("%s: PHY reset\r\n", __FUNCTION__);
/* Reset the PHY */
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_RESET))
return 0;
/* Wait for the PHY to reset */
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
{
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_CR, &settings);
if (!(settings & MII_AM79C874_CR_RESET))
break;
}
if (timeout >= FEC_MII_TIMEOUT)
return 0;
dbg("%s: PHY reset OK\r\n", __FUNCTION__);
dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__);
/* Enable Auto-Negotiation */
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_AUTON | MII_AM79C874_CR_RST_NEG))
return 0;
dbg("%s:PHY Wait for auto-negotiation to complete\r\n", __FUNCTION__);
/* Wait for auto-negotiation to complete */
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
{
settings = 0;
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_SR, &settings);
if ((settings & AUTONEGLINK) == AUTONEGLINK)
break;
}
if (timeout >= FEC_MII_TIMEOUT)
{
dbg("%s: PHY Set the default mode\r\n", __FUNCTION__);
/* Set the default mode (Full duplex, 100 Mbps) */
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_100MB | MII_AM79C874_CR_DPLX))
return 0;
}
#ifdef DBG_AM79
settings = 0;
fec_mii_read(fec_ch, phy_addr, MII_AM79C874_DR, &settings);
dbg("%s: PHY Mode:\r\n", __FUNCTION__);
if (settings & MII_AM79C874_DR_DATA_RATE)
dbg("%s: 100Mbps", __FUNCTION__);
else
dbg("%s: 10Mbps ", __FUNCTION__);
if (settings & MII_AM79C874_DR_DPLX)
dbg("%s: Full-duplex\r\n", __FUNCTION__);
else
dbg("%s: Half-duplex\r\n", __FUNCTION__);
dbg("%s:PHY auto-negociation complete\r\n", __FUNCTION__);
#endif /* DBG_AM79 */
return 1;
}

23
net/fec.c
View File

@@ -17,6 +17,7 @@
#include "bas_string.h"
#include "bas_printf.h"
#include "util.h"
#include "am79c874.h"
#include <stdbool.h>
#if defined(MACHINE_FIREBEE)
@@ -544,19 +545,19 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
{
uint32_t initiator;
int channel;
int result;
(void) result; /* to avoid compiler warning */
int res;
/*
* Make the initiator assignment
*/
result = dma_set_initiator(DMA_FEC_RX(ch));
res = dma_set_initiator(DMA_FEC_RX(ch));
dbg("%s: dma_set_initiator(DMA_FEC_RX(%d)): %d\r\n", __FUNCTION__, ch, res);
/*
* Grab the initiator number
*/
initiator = dma_get_initiator(DMA_FEC_RX(ch));
dbg("%s: dma_get_initiator(DMA_FEC_RX(%d)) = %d\r\n", __FUNCTION__, ch, initiator);
/*
* Determine the DMA channel running the task for the
@@ -564,6 +565,7 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
*/
channel = dma_set_channel(DMA_FEC_RX(ch),
(ch == 0) ? fec0_rx_frame : fec1_rx_frame);
dbg("%s: DMA channel for FEC%1d: %d\r\n", __FUNCTION__, ch, channel);
/*
* Start the Rx DMA task
@@ -588,6 +590,7 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
| MCD_NO_CSUM
| MCD_NO_BYTE_SWAP
);
dbg("%s: Rx DMA task for FEC%1d started\r\n", __FUNCTION__, ch);
}
/********************************************************************/
@@ -612,10 +615,13 @@ void fec_rx_continue(uint8_t ch)
*/
channel = dma_get_channel(DMA_FEC_RX(ch));
dbg("%s: RX DMA channel for FEC%1d is %d\r\n", __FUNCTION__, ch, channel);
/*
* Continue/restart the DMA task
*/
MCD_continDma(channel);
dbg("%s: RX dma on channel %d continued\r\n", __FUNCTION__, channel);
}
/********************************************************************/
@@ -850,13 +856,10 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
void fec0_tx_frame(void);
void fec1_tx_frame(void);
(void) result; /* to avoid compiler warning */
/* FIXME: code assumes that there are always free initiator slots */
/*
* Make the initiator assignment
*/
result = dma_set_initiator(DMA_FEC_TX(ch));
(void) dma_set_initiator(DMA_FEC_TX(ch));
/*
* Grab the initiator number
@@ -1327,7 +1330,11 @@ void fec_eth_setup(uint8_t ch, uint8_t trcvr, uint8_t speed, uint8_t duplex, con
/*
* Initialize the MII interface
*/
#if defined(MACHINE_FIREBEE)
am79c874_init(0, 0, speed, duplex);
#else
fec_mii_init(ch, SYSCLK);
#endif /* MACHINE_FIREBEE */
}
/*

198
net/fecbd.c
View File

@@ -62,89 +62,95 @@ static int iRxbd;
*/
void fecbd_init(uint8_t ch)
{
NBUF *nbuf;
int i;
/*
* Align Buffer Descriptors to 4-byte boundary
*/
RxBD = (FECBD *)(((int) unaligned_bds + 3) & 0xFFFFFFFC);
TxBD = (FECBD *)((int) RxBD + (sizeof(FECBD) * 2 * NRXBD));
NBUF *nbuf;
int i;
/*
* Initialize the Rx Buffer Descriptor ring
*/
for (i = 0; i < NRXBD; ++i)
{
/* Grab a network buffer from the free list */
nbuf = nbuf_alloc();
dbg("%s:\r\n", __FUNCTION__);
/*
* Align Buffer Descriptors to 4-byte boundary
*/
RxBD = (FECBD *)(((int) unaligned_bds + 3) & 0xFFFFFFFC);
TxBD = (FECBD *)((int) RxBD + (sizeof(FECBD) * 2 * NRXBD));
dbg("%s: initialise RX buffer descriptor ring\r\n", __FUNCTION__);
/*
* Initialize the Rx Buffer Descriptor ring
*/
for (i = 0; i < NRXBD; ++i)
{
/* Grab a network buffer from the free list */
nbuf = nbuf_alloc();
if (nbuf == NULL)
{
dbg("%s: could not allocate network buffer\r\n", __FUNCTION__);
return;
}
/* Initialize the BD */
RxBD(ch,i).status = RX_BD_E | RX_BD_INTERRUPT;
RxBD(ch,i).length = RX_BUF_SZ;
RxBD(ch,i).data = nbuf->data;
/* Add the network buffer to the Rx queue */
nbuf_add(NBUF_RX_RING, nbuf);
}
/* Initialize the BD */
RxBD(ch,i).status = RX_BD_E | RX_BD_INTERRUPT;
RxBD(ch,i).length = RX_BUF_SZ;
RxBD(ch,i).data = nbuf->data;
/*
* Set the WRAP bit on the last one
*/
RxBD(ch,i-1).status |= RX_BD_W;
/* Add the network buffer to the Rx queue */
nbuf_add(NBUF_RX_RING, nbuf);
}
/*
* Initialize the Tx Buffer Descriptor ring
*/
for (i = 0; i < NTXBD; ++i)
{
TxBD(ch, i).status = TX_BD_INTERRUPT;
TxBD(ch, i).length = 0;
TxBD(ch, i).data = NULL;
}
/*
* Set the WRAP bit on the last one
*/
RxBD(ch, i - 1).status |= RX_BD_W;
/*
* Set the WRAP bit on the last one
*/
TxBD(ch,i-1).status |= TX_BD_W;
dbg("%s: initialise TX buffer descriptor ring\r\n", __FUNCTION__);
/*
* Initialize the buffer descriptor indexes
*/
iTxbd_new = iTxbd_old = iRxbd = 0;
/*
* Initialize the Tx Buffer Descriptor ring
*/
for (i = 0; i < NTXBD; ++i)
{
TxBD(ch, i).status = TX_BD_INTERRUPT;
TxBD(ch, i).length = 0;
TxBD(ch, i).data = NULL;
}
/*
* Set the WRAP bit on the last one
*/
TxBD(ch, i - 1).status |= TX_BD_W;
/*
* Initialize the buffer descriptor indexes
*/
iTxbd_new = iTxbd_old = iRxbd = 0;
}
void fecbd_dump(uint8_t ch)
{
#ifdef DEBUG_PRINT
int i;
#ifdef DBG_FECBD
int i;
printf("\n------------ FEC%d BDs -----------\n",ch);
printf("RxBD Ring\n");
for (i = 0; i < NRXBD; i++)
{
printf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
i, &RxBD(ch, i),
RxBD(ch, i).status,
RxBD(ch, i).length,
RxBD(ch, i).data);
}
printf("TxBD Ring\n");
for (i = 0; i < NTXBD; i++)
{
printf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
i, &TxBD(ch, i),
TxBD(ch, i).status,
TxBD(ch, i).length,
TxBD(ch, i).data);
}
printf("--------------------------------\n\n");
#endif
xprintf("\n------------ FEC%d BDs -----------\n",ch);
xprintf("RxBD Ring\n");
for (i = 0; i < NRXBD; i++)
{
xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
i, &RxBD(ch, i),
RxBD(ch, i).status,
RxBD(ch, i).length,
RxBD(ch, i).data);
}
xprintf("TxBD Ring\n");
for (i = 0; i < NTXBD; i++)
{
xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n",
i, &TxBD(ch, i),
TxBD(ch, i).status,
TxBD(ch, i).length,
TxBD(ch, i).data);
}
xprintf("--------------------------------\n\n");
#endif /* DBG_FECBD */
}
/*
@@ -159,28 +165,28 @@ void fecbd_dump(uint8_t ch)
*/
uint32_t fecbd_get_start(uint8_t ch, uint8_t direction)
{
switch (direction)
{
case Rx:
return (uint32_t)((int)RxBD + (ch * sizeof(FECBD) * NRXBD));
case Tx:
default:
return (uint32_t)((int)TxBD + (ch * sizeof(FECBD) * NTXBD));
}
switch (direction)
{
case Rx:
return (uint32_t)((int)RxBD + (ch * sizeof(FECBD) * NRXBD));
case Tx:
default:
return (uint32_t)((int)TxBD + (ch * sizeof(FECBD) * NTXBD));
}
}
FECBD *fecbd_rx_alloc(uint8_t ch)
{
int i = iRxbd;
int i = iRxbd;
/* Check to see if the ring of BDs is full */
if (RxBD(ch, i).status & RX_BD_E)
return NULL;
/* Check to see if the ring of BDs is full */
if (RxBD(ch, i).status & RX_BD_E)
return NULL;
/* Increment the circular index */
iRxbd = (uint8_t)((iRxbd + 1) % NRXBD);
/* Increment the circular index */
iRxbd = (uint8_t)((iRxbd + 1) % NRXBD);
return &RxBD(ch, i);
return &RxBD(ch, i);
}
/*
@@ -195,16 +201,16 @@ FECBD *fecbd_rx_alloc(uint8_t ch)
*/
FECBD *fecbd_tx_alloc(uint8_t ch)
{
int i = iTxbd_new;
int i = iTxbd_new;
/* Check to see if the ring of BDs is full */
if (TxBD(ch, i).status & TX_BD_R)
return NULL;
/* Check to see if the ring of BDs is full */
if (TxBD(ch, i).status & TX_BD_R)
return NULL;
/* Increment the circular index */
iTxbd_new = (uint8_t)((iTxbd_new + 1) % NTXBD);
/* Increment the circular index */
iTxbd_new = (uint8_t)((iTxbd_new + 1) % NTXBD);
return &TxBD(ch, i);
return &TxBD(ch, i);
}
/*
@@ -220,14 +226,14 @@ FECBD *fecbd_tx_alloc(uint8_t ch)
*/
FECBD *fecbd_tx_free(uint8_t ch)
{
int i = iTxbd_old;
int i = iTxbd_old;
/* Check to see if the ring of BDs is empty */
if ((TxBD(ch, i).data == NULL) || (TxBD(ch, i).status & TX_BD_R))
return NULL;
/* Check to see if the ring of BDs is empty */
if ((TxBD(ch, i).data == NULL) || (TxBD(ch, i).status & TX_BD_R))
return NULL;
/* Increment the circular index */
iTxbd_old = (uint8_t)((iTxbd_old + 1) % NTXBD);
/* Increment the circular index */
iTxbd_old = (uint8_t)((iTxbd_old + 1) % NTXBD);
return &TxBD(ch, i);
return &TxBD(ch, i);
}