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reformatted

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This commit is contained in:
Markus Fröschle
2014-12-30 22:25:36 +00:00
parent 7a4037eb24
commit 1ca15ed48b
2 changed files with 59 additions and 57 deletions
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114
sys/exceptions.S
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@@ -187,30 +187,30 @@ init_vec_loop:
#ifdef MACHINE_FIREBEE
// ACP interrupts 1-7 (user-defined, generated by FPGA on the FireBee, M5484LITE has irq7 and irq5 for PCI)
lea mfp_irq1(pc),a1
lea mfp_irq1(pc),a1
move.l a1,0x104(a0)
lea mfp_irq2(pc),a1
lea mfp_irq2(pc),a1
move.l a1,0x108(a0)
lea mfp_irq3(pc),a1
lea mfp_irq3(pc),a1
move.l a1,0x10c(a0)
lea mfp_irq4(pc),a1
lea mfp_irq4(pc),a1
move.l a1,0x110(a0)
lea mfp_irq5(pc),a1
lea mfp_irq5(pc),a1
move.l a1,0x114(a0)
lea mfp_irq6(pc),a1
lea mfp_irq6(pc),a1
move.l a1,0x118(a0)
lea mfp_irq7(pc),a1
lea mfp_irq7(pc),a1
move.l a1,0x11c(a0)
// timer vectors (triggers when vbashi gets changed, used for video page copy)
lea handler_gpt0(pc),a1
lea handler_gpt0(pc),a1
// GPT0 interrupt source = 62
move.l a1,(INT_SOURCE_GPT0 + 64) * 4(a0)
#endif /* MACHINE_FIREBEE */
// install lowlevel_isr_handler for the three GPT timers
lea _lowlevel_isr_handler(pc),a1
lea _lowlevel_isr_handler(pc),a1
move.l a1,(INT_SOURCE_GPT1 + 64) * 4(a0)
move.l a1,(INT_SOURCE_GPT2 + 64) * 4(a0)
move.l a1,(INT_SOURCE_GPT3 + 64) * 4(a0)
@@ -254,22 +254,22 @@ _std_exc_vec:
lsr.l #2,d0 // shift vector number in place
cmp.l #33,d0
beq noprint
beq noprint
cmp.l #34,d0
beq noprint
beq n oprint
cmp.l #45,d0
beq noprint
beq noprint
cmp.l #46,d0
beq noprint
beq noprint
move.l 4 * 4 + 8 + 4(sp),-(sp) // pc at exception
move.l d0,-(sp) // provide it to xprintf()
pea exception_text
jsr _xprintf // call xprintf()
pea exception_text
jsr _xprintf // call xprintf()
add.l #3*4,sp // adjust stack
noprint:
movem.l (sp),d0-d1/a0-a1 // restore registers
lea 4 * 4(sp),sp
lea 4 * 4(sp),sp
#endif /* DBG_EXC */
add.l _rt_vbr,d0 // + VBR
@@ -309,11 +309,11 @@ access:
move.l MCF_MMU_MMUAR,-(sp) // MMU fault address
move.l MCF_MMU_MMUSR,-(sp) // MMU status regisrter
move.w #0x2300,sr // can lower interrupt mask now that MMU status is safe
jsr _mmutr_miss // call C routine
jsr _mmutr_miss // call C routine
lea 4 * 4(sp),sp // adjust stack
tst.l d0 // exception handler signals bus error
bne bus_error
bne bus_error
movem.l (sp),d0-d1/a0-a1 // restore registers
unlk a6
@@ -322,7 +322,7 @@ access:
bus_error:
movem.l (sp),d0-d1/a0-a1 // restore registers
unlk a6
bra std_exc_vec
bra std_exc_vec
zero_divide:
move.w #0x2700,sr // disable interrupt
@@ -331,23 +331,23 @@ zero_divide:
move.l 12(sp),a0 // pc
move.w (a0)+,d0 // command word
btst #7,d0 // long?
beq zd_word // nein->
beq zd_word // nein->
addq.l #2,a0
zd_word:
and.l 0x3f,d0 // mask out ea field
cmp.w #0x08,d0 // -(ax) or less?
ble zd_end
ble zd_end
addq.l #2,a0
cmp.w #0x39,d0 // xxx.L
bne zd_nal
bne zd_nal
addq.l #2,a0
bra zd_end
bra zd_end
zd_nal: cmp.w #0x3c,d0 // immediate?
bne zd_end // no->
zd_nal: cmp.w #0x3c,d0 // immediate?
bne zd_end // no->
btst #7,d0 // long?
beq zd_end // no
beq zd_end // no
addq.l #2,a0
zd_end:
move.l a0,12(sp)
@@ -419,13 +419,13 @@ mfp_irq4:
irq5: // irq5 is tied to PCI INTC# and PCI INTD# on the M5484LITE
move.w #0x2700,sr // disable interrupts
lea -4*4(sp),sp // save gcc scratch registers
lea -4*4(sp),sp // save gcc scratch registers
movem.l d0-d1/a0-a1,(sp)
jsr _irq5_handler // call C handler routine
jsr _irq5_handler // call C handler routine
movem.l (sp),d0-d1/a0-a1 // restore registers
lea 4*4(sp),sp
lea 4*4(sp),sp
rte // return from exception
@@ -440,13 +440,13 @@ mfp_irq7: // irq7 is tied to PCI INTA#
move.w #0x2700,sr // disable interrupts
lea -4*4(sp),sp // save gcc scratch registers
lea -4*4(sp),sp // save gcc scratch registers
movem.l d0-d1/a0-a1,(sp)
jsr _irq7_handler // call C handler routine
jsr _irq7_handler // call C handler routine
movem.l (sp),d0-d1/a0-a1 // restore registers
lea 4*4(sp),sp
lea 4*4(sp),sp
rte // return from exception
@@ -463,10 +463,10 @@ mfp_irq5: move.w #0x2700,sr // disable interrupts
link a6,#-4 * 4 // save gcc scratch registers
movem.l d0-d1/a0-a1,(sp)
jsr _irq5_handler // call C handler routine
jsr _irq5_handler // call C handler routine
tst.l d0 // handled?
bne irq5_forward
bne irq5_forward
movem.l (sp),d0-d1/a0-a1 // restore registers
unlk a6
@@ -484,18 +484,18 @@ irq5_forward: move.l 0x74,a0 // fetch OS irq5 vector
rts // jump through vector
#ifdef _NOT_USED_
mfp_irq6: move.w #0x2700,sr // disable interrupt
mfp_irq6: move.w #0x2700,sr // disable interrupt
subq.l #4,sp // extra space
link a6,#-4 * 4 // save gcc scratch registers
movem.l d0-d1/a0-a1,(sp)
move.l 4(a6),-(sp) // format status word
move.l 8(a6),-(sp) // pc at exception
jsr _irq6_handler // call C handler
lea 8(sp),sp // fix stack
jsr _irq6_handler // call C handler
lea 8(sp),sp // fix stack
tst.l d0 // interrupt handled?
bne irq6_forward // no, forward to TOS
bne irq6_forward // no, forward to TOS
movem.l (sp),d0-d1/a0-a1 // restore registers
unlk a6
@@ -523,12 +523,12 @@ mfp_irq6:
subq.l #8,sp
movem.l d0/a5,(sp) // save registers
lea MCF_EPORT_EPFR,a5 // clear int6 from edge port
lea MCF_EPORT_EPFR,a5 // clear int6 from edge port
bset #6,(a5)
mfp_irq6_non_sca:
// test auf acsi dma -----------------------------------------------------------------
lea 0xfffffa0b,a5
lea 0xfffffa0b,a5
bset #7,-4(a5) // int ena
btst.b #7,(a5) // acsi dma int?
beq mfp_non_acsi_dma
@@ -538,19 +538,19 @@ mfp_non_acsi_dma:
tst.b (a5)
bne mfp_irq6_1
tst.b 2(a5)
bne mfp_irq6_1
bne mfp_irq6_1
movem.l (sp),d0/a5
addq.l #8,sp
rte
mfp_irq6_1:
lea MCF_GPIO_PODR_FEC1L,a5
lea MCF_GPIO_PODR_FEC1L,a5
bclr.b #4,(a5) // led on
lea blinker,a5
lea blinker,a5
addq.l #1,(a5) // +1
move.l (a5),d0
and.l #0x80,d0
bne mfp_irq6_2
lea MCF_GPIO_PODR_FEC1L,a5
bne mfp_irq6_2
lea MCF_GPIO_PODR_FEC1L,a5
bset.b #4,(a5) // led off
/*
@@ -601,12 +601,12 @@ acsi_dma: // atari dma
acsi_dma_start:
move.l -12(a5),a1 // dma adresse
move.l -8(a5),d0 // byt counter
ble acsi_dma_end
ble acsi_dma_end
btst.b #0,-16(a5) // write? (dma modus reg)
bne acsi_dma_wl // ja->
bne acsi_dma_wl // ja->
acsi_dma_rl:
tst.b -4(a5) // dma req?
bpl acsi_dma_finished // nein->
bpl acsi_dma_finished // nein->
move.l (a5),(a1)+ // read 4 bytes
move.l (a5),(a1)+ // read 4 bytes
move.l (a5),(a1)+ // read 4 bytes
@@ -616,11 +616,11 @@ acsi_dma_rl:
move.b d1,MCF_PSC0_PSCTB_8BIT
sub.l #16,d0 // byt counter -16
bpl acsi_dma_rl
bra acsi_dma_finished
bpl acsi_dma_rl
bra acsi_dma_finished
acsi_dma_wl:
tst.b -4(a5) // dma req?
bpl acsi_dma_finished // nein->
bpl acsi_dma_finished // nein->
move.l (a1)+,(a5) // write 4 byts
move.l (a1)+,(a5) // write 4 byts
move.l (a1)+,(a5) // write 4 byts
@@ -630,14 +630,14 @@ acsi_dma_wl:
move.b d1,MCF_PSC0_PSCTB_8BIT
sub.l #16,d0 // byt counter -16
bpl acsi_dma_wl
bpl acsi_dma_wl
acsi_dma_finished:
move.l a1,-12(a5) // adresse zur<EFBFBD>ck
move.l d0,-8(a5) // byt counter zur<EFBFBD>ck
acsi_dma_end:
tst.b -4(a5) // dma req?
bmi acsi_dma_start // ja->
lea 0xfffffa0b,a5
bmi acsi_dma_start // ja->
lea 0xfffffa0b,a5
bclr.b #7,4(a5) // clear int in service mfp
bclr.b #7,(a5) // clear int pending mfp 0xfffffa0b
@@ -654,7 +654,7 @@ acsi_dma_end:
* irq 7 = pseudo bus error
*/
mfp_irq7:
lea -12(sp),sp
lea -12(sp),sp
movem.l d0/a0,(sp)
move.l __RAMBAR0+0x008,a0 // real access error handler
@@ -668,7 +668,7 @@ mfp_irq7:
// TODO: Inside an interrupt handler, 16(sp) is the return address.
// For an Access Error, it should be the address of the fault instruction instead
lea MCF_EPORT_EPFR,a0
lea MCF_EPORT_EPFR,a0
bset #7,(a0) // clear int 7
move.l (sp)+,d0 // restore registers
@@ -694,7 +694,7 @@ handler_gpt0:
move.w 4(a6),d0 // fetch vector number from stack
move.l d0,-(sp) // push it
jsr _gpt0_interrupt_handler // call C handler
jsr _gpt0_interrupt_handler // call C handler
addq.l #4,sp // adjust stack
movem.l (sp),d0-d1/a0-a1 // restore registers