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fixed formatting

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This commit is contained in:
Markus Fröschle
2015-01-07 13:54:35 +00:00
parent 1ca15ed48b
commit 19c8636eae
4 changed files with 64 additions and 50 deletions
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4
BaS_gcc.files
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@@ -191,3 +191,7 @@ tos/vmem_test/sources/printf_helper.S
tos/vmem_test/sources/vmem_test.c tos/vmem_test/sources/vmem_test.c
sys/startcf.S sys/startcf.S
sys/exceptions.S sys/exceptions.S
util/bas_printf.c
util/bas_string.c
util/printf_helper.S
util/wait.c

23
include/i2c-algo-bit.h
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@@ -32,18 +32,19 @@
* manipulate the line states, and to init any hw-specific features. This is * manipulate the line states, and to init any hw-specific features. This is
* only used if you have more than one hw-type of adapter running. * only used if you have more than one hw-type of adapter running.
*/ */
struct i2c_algo_bit_data { struct i2c_algo_bit_data
void *data; /* private data for lowlevel routines */ {
void (*setsda) (void *data, int state); void *data; /* private data for lowlevel routines */
void (*setscl) (void *data, int state); void (*setsda) (void *data, int state);
int (*getsda) (void *data); void (*setscl) (void *data, int state);
int (*getscl) (void *data); int (*getsda) (void *data);
int (*getscl) (void *data);
/* local settings */ /* local settings */
int udelay; /* half-clock-cycle time in microsecs */ int udelay; /* half-clock-cycle time in microsecs */
/* i.e. clock is (500 / udelay) KHz */ /* i.e. clock is (500 / udelay) KHz */
int mdelay; /* in millisecs, unused */ int mdelay; /* in millisecs, unused */
int timeout; /* in jiffies */ int timeout; /* in jiffies */
}; };
#define I2C_BIT_ADAP_MAX 16 #define I2C_BIT_ADAP_MAX 16

47
include/i2c.h
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@@ -44,39 +44,42 @@ extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
* be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584 * be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584
* to name two of the most common. * to name two of the most common.
*/ */
struct i2c_algorithm { struct i2c_algorithm
unsigned int id; {
int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs, int num); unsigned int id;
/* --- ioctl like call to set div. parameters. */ int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs, int num);
int (*algo_control)(struct i2c_adapter *, unsigned int, unsigned long); /* --- ioctl like call to set div. parameters. */
int (*algo_control)(struct i2c_adapter *, unsigned int, unsigned long);
}; };
/* /*
* i2c_adapter is the structure used to identify a physical i2c bus along * i2c_adapter is the structure used to identify a physical i2c bus along
* with the access algorithms necessary to access it. * with the access algorithms necessary to access it.
*/ */
struct i2c_adapter { struct i2c_adapter
struct i2c_algorithm *algo;/* the algorithm to access the bus */ {
void *algo_data; struct i2c_algorithm *algo; /* the algorithm to access the bus */
int timeout; void *algo_data;
int retries; int timeout;
int nr; int retries;
int nr;
}; };
/* /*
* I2C Message - used for pure i2c transaction, also from /dev interface * I2C Message - used for pure i2c transaction, also from /dev interface
*/ */
struct i2c_msg { struct i2c_msg
unsigned short addr; /* slave address */ {
unsigned short flags; unsigned short addr; /* slave address */
#define I2C_M_TEN 0x10 /* we have a ten bit chip address */ unsigned short flags;
#define I2C_M_RD 0x01 #define I2C_M_TEN 0x10 /* we have a ten bit chip address */
#define I2C_M_NOSTART 0x4000 #define I2C_M_RD 0x01
#define I2C_M_REV_DIR_ADDR 0x2000 #define I2C_M_NOSTART 0x4000
#define I2C_M_IGNORE_NAK 0x1000 #define I2C_M_REV_DIR_ADDR 0x2000
#define I2C_M_NO_RD_ACK 0x0800 #define I2C_M_IGNORE_NAK 0x1000
unsigned short len; /* msg length */ #define I2C_M_NO_RD_ACK 0x0800
unsigned char *buf; /* pointer to msg data */ unsigned short len; /* msg length */
unsigned char *buf; /* pointer to msg data */
}; };
#endif /* _I2C_H */ #endif /* _I2C_H */

40
sys/exceptions.S
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@@ -225,7 +225,7 @@ init_vec_loop:
move.l a1,(INT_SOURCE_XLBPCI + 64) * 4(a0) move.l a1,(INT_SOURCE_XLBPCI + 64) * 4(a0)
#ifndef MACHINE_FIREBEE #ifndef MACHINE_FIREBEE
// FEC1 not wired on the FireBee, but used on other machines // FEC1 not wired on the FireBee (used for FPGA as GPIO), but used on other machines
move.l a1,(INT_SOURCE_FEC1 + 64) * 4(a0) move.l a1,(INT_SOURCE_FEC1 + 64) * 4(a0)
#endif #endif
@@ -234,6 +234,7 @@ init_vec_loop:
move.l (sp)+,a2 // Restore registers move.l (sp)+,a2 // Restore registers
rts rts
/* /*
* exception vector routines * exception vector routines
*/ */
@@ -295,8 +296,8 @@ reset_vector:
move.w #0x2700,sr // disable interrupt move.w #0x2700,sr // disable interrupt
move.l #0x31415926,d0 move.l #0x31415926,d0
cmp.l 0x426,d0 // _resvalid: reset vector valid? cmp.l 0x426,d0 // _resvalid: reset vector valid?
beq std_exc_vec // yes-> beq std_exc_vec // yes->
jmp _rom_entry // no, cold start machine jmp _rom_entry // no, cold start machine
access: access:
move.w #0x2700,sr // disable interrupts move.w #0x2700,sr // disable interrupts
@@ -310,7 +311,7 @@ access:
move.l MCF_MMU_MMUSR,-(sp) // MMU status regisrter move.l MCF_MMU_MMUSR,-(sp) // MMU status regisrter
move.w #0x2300,sr // can lower interrupt mask now that MMU status is safe move.w #0x2300,sr // can lower interrupt mask now that MMU status is safe
jsr _mmutr_miss // call C routine jsr _mmutr_miss // call C routine
lea 4 * 4(sp),sp // adjust stack lea 4 * 4(sp),sp // adjust stack
tst.l d0 // exception handler signals bus error tst.l d0 // exception handler signals bus error
bne bus_error bne bus_error
@@ -402,16 +403,16 @@ irq7:
irq 0x7c,7,0x80 // IRQ7 irq 0x7c,7,0x80 // IRQ7
mfp_irq1: mfp_irq1:
irq 0x104,1,0x02 // IRQ1 irq 0x104,1,0x02 // MFP IRQ1
mfp_irq2: mfp_irq2:
irq 0x108,2,0x04 // IRQ2 irq 0x108,2,0x04 // MFP IRQ2
mfp_irq3: mfp_irq3:
irq 0x10c,3,0x08 // IRQ3 irq 0x10c,3,0x08 // MFP IRQ3
mfp_irq4: mfp_irq4:
irq 0x110,4,0x10 // IRQ4 irq 0x110,4,0x10 // MFP IRQ4
#if MACHINE_M5484LITE_notyet // handlers for M5484LITE #if MACHINE_M5484LITE_notyet // handlers for M5484LITE
@@ -531,12 +532,12 @@ mfp_irq6_non_sca:
lea 0xfffffa0b,a5 lea 0xfffffa0b,a5
bset #7,-4(a5) // int ena bset #7,-4(a5) // int ena
btst.b #7,(a5) // acsi dma int? btst.b #7,(a5) // acsi dma int?
beq mfp_non_acsi_dma beq mfp_non_acsi_dma
bsr acsi_dma bsr acsi_dma
mfp_non_acsi_dma: mfp_non_acsi_dma:
// ---------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------
tst.b (a5) tst.b (a5)
bne mfp_irq6_1 bne mfp_irq6_1
tst.b 2(a5) tst.b 2(a5)
bne mfp_irq6_1 bne mfp_irq6_1
movem.l (sp),d0/a5 movem.l (sp),d0/a5
@@ -591,11 +592,11 @@ acsi_dma: // atari dma
move.l a1,-(sp) move.l a1,-(sp)
move.l d1,-(sp) move.l d1,-(sp)
//lea MCF_PSC0_PSCTB_8BIT,a1 // ++ vr //lea MCF_PSC0_PSCTB_8BIT,a1 // ++ vr
// mchar move.l, 'D,'M','A,'\ ,(a1) //mchar move.l, 'D,'M','A,'\ ,(a1)
//move.l #"DMA ",(a1) //move.l #"DMA ",(a1)
// mchar move.l,'I,'N,'T,'!,(a1) //mchar move.l,'I,'N,'T,'!,(a1)
// move.l #'INT!',(a1) //move.l #'INT!',(a1)
lea 0xf0020110,a5 // fifo daten lea 0xf0020110,a5 // fifo daten
acsi_dma_start: acsi_dma_start:
@@ -684,6 +685,11 @@ mfp_irq7:
* when the video base address gets changed * when the video base address gets changed
*/ */
/*
* TODO: remove. This interrupt still fires, but doesn't do anything anymore.
* BaS_gcc handles FPGA RAM as STRAM, so there is no page copy necessary as
* it was with previous versions.
*/
handler_gpt0: handler_gpt0:
.extern _gpt0_interrupt_handler .extern _gpt0_interrupt_handler
@@ -721,7 +727,7 @@ _lowlevel_isr_handler:
lsr.l #2,d0 // move it in place lsr.l #2,d0 // move it in place
andi.l #0xff,d0 // mask it out andi.l #0xff,d0 // mask it out
move.l d0,-(sp) // push it move.l d0,-(sp) // push it
jsr _isr_execute_handler // call the C handler jsr _isr_execute_handler // call the C handler
addq.l #4,sp // adjust stack addq.l #4,sp // adjust stack
movem.l (sp),d0-d1/a0-a1 // restore registers movem.l (sp),d0-d1/a0-a1 // restore registers