From 02c0dac9689e326e681f3f4c25b398a335b31502 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Markus=20Fr=C3=B6schle?= Date: Tue, 23 Jun 2020 16:01:28 +0200 Subject: [PATCH] final fixes to copy BaS() to RAM again This should now avoid crashes when flashing BaS_gcc using FLASH_CF.PRG from EmuTOS --- bas.lk.in | 460 ++++++++++++++++++++++++++++++-------------------- sys/BaS.c | 30 ++++ sys/sysinit.c | 119 ++----------- 3 files changed, 315 insertions(+), 294 deletions(-) diff --git a/bas.lk.in b/bas.lk.in index 2389932..683ff28 100644 --- a/bas.lk.in +++ b/bas.lk.in @@ -19,234 +19,320 @@ MEMORY { - bas_rom (ROMFLAGS) : ORIGIN = TARGET_ADDRESS, LENGTH = 0x00100000 - /* - * target to copy BaS data segment to. 1M should be enough for now - */ - bas_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00200000, LENGTH = 0x00100000 - /* - * driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory - */ - driver_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00100000, LENGTH = 0x00100000 + bas_rom (ROMFLAGS) : ORIGIN = TARGET_ADDRESS, LENGTH = 0x00100000 + /* + * target to copy BaS code + data segment to. 1M should be enough for now + */ + bas_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00200000, LENGTH = 0x00100000 + /* + * driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory + */ + driver_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00100000, LENGTH = 0x00100000 } SECTIONS -{ - /* BaS in ROM */ - .text : - { - OBJDIR/startcf.o(.text) /* this one is the entry point so it must be the first */ +{ + .driver_memory : + { + . = ALIGN(4); + driver_mem = .; + . = . + DRIVER_MEM_BUFFER_SIZE; + } > driver_ram - OBJDIR/sysinit.o(.text) - OBJDIR/fault_vectors.o(.text) -#ifdef MACHINE_FIREBEE - OBJDIR/init_fpga.o(.text) -#endif /* MACHINE_FIREBEE */ - OBJDIR/wait.o(.text) - OBJDIR/exceptions.o(.text) - OBJDIR/setjmp.o(.text) - OBJDIR/driver_vec.o(.text) - OBJDIR/interrupts.o(.text) - OBJDIR/mmu.o(.text) + _driver_mem_buffer = driver_mem; - OBJDIR/BaS.o(.text) - OBJDIR/pci.o(.text) - . = ALIGN(16); - OBJDIR/pci_errata.o(.text) - OBJDIR/pci_wrappers.o(.text) - OBJDIR/usb.o(.text) - OBJDIR/driver_mem.o(.text) - OBJDIR/usb_hub.o(.text) - OBJDIR/usb_mouse.o(.text) - OBJDIR/usb_kbd.o(.text) - OBJDIR/ohci-hcd.o(.text) - OBJDIR/ehci-hcd.o(.text) - OBJDIR/wait.o(.text) + /* BaS in ROM */ + .text : + { + OBJDIR/startcf.o(.text) /* this one is the entry point so it must be the first */ - OBJDIR/nbuf.o(.text) - OBJDIR/net_timer.o(.text) - OBJDIR/queue.o(.text) - OBJDIR/nif.o(.text) - OBJDIR/fecbd.o(.text) - OBJDIR/fec.o(.text) - OBJDIR/am79c874.o(.text) - OBJDIR/bcm5222.o(.text) - OBJDIR/ip.o(.text) - OBJDIR/udp.o(text) - OBJDIR/bootp.o(text) - OBJDIR/tftp.o(text) - OBJDIR/arp.o(text) + OBJDIR/sysinit.o(.text) + OBJDIR/fault_vectors.o(.text) - OBJDIR/unicode.o(.text) - OBJDIR/mmc.o(.text) - OBJDIR/ff.o(.text) - OBJDIR/sd_card.o(.text) - OBJDIR/s19reader.o(.text) - OBJDIR/bas_printf.o(.text) - OBJDIR/bas_string.o(.text) - OBJDIR/conout.o(.text) - OBJDIR/ide.o(.text) -#if (FORMAT_ELF == 1) - OBJDIR/libgcc_helper.o(.text) -#endif - OBJDIR/cache.o(.text) - OBJDIR/dma.o(.text) - OBJDIR/MCD_dmaApi.o(.text) - OBJDIR/MCD_tasks.o(.text) - OBJDIR/MCD_tasksInit.o(.text) - - OBJDIR/video.o(.text) - OBJDIR/videl.o(.text) - OBJDIR/fbmem.o(.text) - OBJDIR/fbmon.o(.text) - OBJDIR/fbmodedb.o(.text) - OBJDIR/fnt_st_8x16.o(.text) - OBJDIR/offscreen.o(.text) - - OBJDIR/x86emu.o(.text) - OBJDIR/x86emu_util.o(.text) - OBJDIR/x86pcibios.o(.text) - OBJDIR/x86biosemu.o(.text) - - OBJDIR/i2c-algo-bit.o(.text) - - OBJDIR/radeon_base.o(.text) - OBJDIR/radeon_accel.o(.text) - OBJDIR/radeon_cursor.o(.text) - OBJDIR/radeon_monitor.o(.text) - OBJDIR/radeon_i2c.o(.text) - - OBJDIR/xhdi_sd.o(.text) - OBJDIR/xhdi_interface.o(.text) - OBJDIR/xhdi_vec.o(.text) #ifdef COMPILE_RAM - /* - * if we compile to RAM anyway, there is no need to copy anything - */ - . = ALIGN(4); - __BAS_DATA_START = .; - *(.data) - __BAS_DATA_END = .; - __BAS_BSS_START = .; - *(.bss) - __BAS_BSS_END = .; -#endif /* COMPILE_RAM */ +#ifdef MACHINE_FIREBEE + OBJDIR/init_fpga.o(.text) +#endif /* MACHINE_FIREBEE */ + OBJDIR/wait.o(.text) + OBJDIR/exceptions.o(.text) + OBJDIR/setjmp.o(.text) + OBJDIR/driver_vec.o(.text) + OBJDIR/interrupts.o(.text) + OBJDIR/mmu.o(.text) + OBJDIR/BaS.o(.text) + OBJDIR/pci.o(.text) + . = ALIGN(16); + OBJDIR/pci_errata.o(.text) + OBJDIR/pci_wrappers.o(.text) + OBJDIR/usb.o(.text) + OBJDIR/driver_mem.o(.text) + OBJDIR/usb_hub.o(.text) + OBJDIR/usb_mouse.o(.text) + OBJDIR/usb_kbd.o(.text) + OBJDIR/ohci-hcd.o(.text) + OBJDIR/ehci-hcd.o(.text) + OBJDIR/wait.o(.text) + + OBJDIR/nbuf.o(.text) + OBJDIR/net_timer.o(.text) + OBJDIR/queue.o(.text) + OBJDIR/nif.o(.text) + OBJDIR/fecbd.o(.text) + OBJDIR/fec.o(.text) + OBJDIR/am79c874.o(.text) + OBJDIR/bcm5222.o(.text) + OBJDIR/ip.o(.text) + OBJDIR/udp.o(text) + OBJDIR/bootp.o(text) + OBJDIR/tftp.o(text) + OBJDIR/arp.o(text) + + OBJDIR/unicode.o(.text) + OBJDIR/mmc.o(.text) + OBJDIR/ff.o(.text) + OBJDIR/sd_card.o(.text) + OBJDIR/s19reader.o(.text) + OBJDIR/bas_printf.o(.text) + OBJDIR/bas_string.o(.text) + OBJDIR/conout.o(.text) + OBJDIR/ide.o(.text) #if (FORMAT_ELF == 1) - *(.eh_frame) - *(.rodata) - *(.rodata.*) -#endif - } > bas_rom + OBJDIR/libgcc_helper.o(.text) +#endif /* FORMAT_ELF */ + OBJDIR/cache.o(.text) + OBJDIR/dma.o(.text) + OBJDIR/MCD_dmaApi.o(.text) + OBJDIR/MCD_tasks.o(.text) + OBJDIR/MCD_tasksInit.o(.text) + OBJDIR/video.o(.text) + OBJDIR/videl.o(.text) + OBJDIR/fbmem.o(.text) + OBJDIR/fbmon.o(.text) + OBJDIR/fbmodedb.o(.text) + OBJDIR/fnt_st_8x16.o(.text) + OBJDIR/offscreen.o(.text) + + OBJDIR/x86emu.o(.text) + OBJDIR/x86emu_util.o(.text) + OBJDIR/x86pcibios.o(.text) + OBJDIR/x86biosemu.o(.text) + + OBJDIR/i2c-algo-bit.o(.text) + + OBJDIR/radeon_base.o(.text) + OBJDIR/radeon_accel.o(.text) + OBJDIR/radeon_cursor.o(.text) + OBJDIR/radeon_monitor.o(.text) + OBJDIR/radeon_i2c.o(.text) + + OBJDIR/xhdi_sd.o(.text) + OBJDIR/xhdi_interface.o(.text) + OBJDIR/xhdi_vec.o(.text) + + /* + * if we compile to RAM anyway, there is no need to copy anything + */ + . = ALIGN(4); + _BAS_DATA_START = .; + *(.data) + __BAS_DATA_END = .; + __BAS_BSS_START = .; + *(.bss) + __BAS_BSS_END = .; +#endif /* COMPILE_RAM */ + } > bas_rom #if (TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS) - /* - * put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran - */ - .bas : - AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4)) - { - . = ALIGN(4); /* same alignment than AT() statement! */ - __BAS_DATA_START = .; - *(.data) - __BAS_DATA_END = .; - __BAS_BSS_START = .; - *(.bss) - __BAS_BSS_END = .; - . = ALIGN(16); - } > bas_ram + /* + * put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran + */ + _driver_mem_buffer = driver_mem; + .bas : AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4)) + { + _BAS_IN_RAM = .; + +#ifdef MACHINE_FIREBEE + OBJDIR/init_fpga.o(.text) +#endif /* MACHINE_FIREBEE */ + OBJDIR/wait.o(.text) + OBJDIR/exceptions.o(.text) + OBJDIR/setjmp.o(.text) + OBJDIR/driver_vec.o(.text) + OBJDIR/interrupts.o(.text) + OBJDIR/mmu.o(.text) + + OBJDIR/BaS.o(.text) + OBJDIR/pci.o(.text) + . = ALIGN(16); + OBJDIR/pci_errata.o(.text) + OBJDIR/pci_wrappers.o(.text) + OBJDIR/usb.o(.text) + OBJDIR/driver_mem.o(.text) + OBJDIR/usb_hub.o(.text) + OBJDIR/usb_mouse.o(.text) + OBJDIR/usb_kbd.o(.text) + OBJDIR/ohci-hcd.o(.text) + OBJDIR/ehci-hcd.o(.text) + OBJDIR/wait.o(.text) + + OBJDIR/nbuf.o(.text) + OBJDIR/net_timer.o(.text) + OBJDIR/queue.o(.text) + OBJDIR/nif.o(.text) + OBJDIR/fecbd.o(.text) + OBJDIR/fec.o(.text) + OBJDIR/am79c874.o(.text) + OBJDIR/bcm5222.o(.text) + OBJDIR/ip.o(.text) + OBJDIR/udp.o(text) + OBJDIR/bootp.o(text) + OBJDIR/tftp.o(text) + OBJDIR/arp.o(text) + + OBJDIR/unicode.o(.text) + OBJDIR/mmc.o(.text) + OBJDIR/ff.o(.text) + OBJDIR/sd_card.o(.text) + OBJDIR/s19reader.o(.text) + OBJDIR/bas_printf.o(.text) + OBJDIR/bas_string.o(.text) + OBJDIR/conout.o(.text) + OBJDIR/ide.o(.text) +#if (FORMAT_ELF == 1) + OBJDIR/libgcc_helper.o(.text) #endif + OBJDIR/cache.o(.text) + OBJDIR/dma.o(.text) + OBJDIR/MCD_dmaApi.o(.text) + OBJDIR/MCD_tasks.o(.text) + OBJDIR/MCD_tasksInit.o(.text) - .driver_memory : - { - . = ALIGN(4); - _driver_mem_buffer = .; - //. = . + DRIVER_MEM_BUFFER_SIZE; - } > driver_ram + OBJDIR/video.o(.text) + OBJDIR/videl.o(.text) + OBJDIR/fbmem.o(.text) + OBJDIR/fbmon.o(.text) + OBJDIR/fbmodedb.o(.text) + OBJDIR/fnt_st_8x16.o(.text) + OBJDIR/offscreen.o(.text) - /* - * Global memory map - */ + OBJDIR/x86emu.o(.text) + OBJDIR/x86emu_util.o(.text) + OBJDIR/x86pcibios.o(.text) + OBJDIR/x86biosemu.o(.text) - /* SDRAM Initialization */ - ___SDRAM = SDRAM_START; - ___SDRAM_SIZE = SDRAM_SIZE; - _SDRAM_VECTOR_TABLE = ___SDRAM; + OBJDIR/i2c-algo-bit.o(.text) - /* ST-RAM */ - __STRAM = ___SDRAM; - __STRAM_END = __TOS; + OBJDIR/radeon_base.o(.text) + OBJDIR/radeon_accel.o(.text) + OBJDIR/radeon_cursor.o(.text) + OBJDIR/radeon_monitor.o(.text) + OBJDIR/radeon_i2c.o(.text) - /* TOS */ - __TOS = 0x00e00000; + OBJDIR/xhdi_sd.o(.text) + OBJDIR/xhdi_interface.o(.text) + OBJDIR/xhdi_vec.o(.text) - /* FastRAM */ - __FASTRAM = 0x10000000; - __TARGET_ADDRESS = TARGET_ADDRESS; + . = ALIGN(4); /* same alignment than AT() statement! */ + __BAS_DATA_START = .; + *(.data) +#if (FORMAT_ELF == 1) + *(.eh_frame) + *(.rodata) + *(.rodata.*) +#endif + __BAS_DATA_END = .; + __BAS_BSS_START = .; + *(.bss) + __BAS_BSS_END = .; + + . = ALIGN(16); + } > bas_ram +#endif /* compile to RAM (copy after sysinit()) + + /* + * Global memory map + */ + + /* SDRAM Initialization */ + ___SDRAM = SDRAM_START; + ___SDRAM_SIZE = SDRAM_SIZE; + _SDRAM_VECTOR_TABLE = ___SDRAM; + + /* ST-RAM */ + __STRAM = ___SDRAM; + __STRAM_END = __TOS; + + /* TOS */ + __TOS = 0x00e00000; + + /* FastRAM */ + __FASTRAM = 0x10000000; + __TARGET_ADDRESS = TARGET_ADDRESS; #if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS - __FASTRAM_END = __BAS_IN_RAM; + __FASTRAM_END = __BAS_IN_RAM; #else - __FASTRAM_END = TARGET_ADDRESS; + __FASTRAM_END = TARGET_ADDRESS; #endif - __FASTRAM_SIZE = __FASTRAM_END - __FASTRAM; + __FASTRAM_SIZE = __FASTRAM_END - __FASTRAM; - /* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */ - ___BOOT_FLASH = BOOTFLASH_BASE_ADDRESS; - ___BOOT_FLASH_SIZE = BOOTFLASH_SIZE; + /* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */ + ___BOOT_FLASH = BOOTFLASH_BASE_ADDRESS; + ___BOOT_FLASH_SIZE = BOOTFLASH_SIZE; #if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS - /* BaS */ - __BAS_LMA = LOADADDR(.bas); - __BAS_IN_RAM = ADDR(.bas); - __BAS_SIZE = SIZEOF(.bas); + /* BaS */ + __BAS_LMA = LOADADDR(.bas); + __BAS_IN_RAM = ADDR(.bas); + __BAS_SIZE = SIZEOF(.bas); #else - /* BaS is already in RAM - no need to copy anything */ - __BAS_IN_RAM = __FASTRAM_END; - __BAS_SIZE = 0; - __BAS_LMA = __BAS_IN_RAM; + /* BaS is already in RAM - no need to copy anything */ + __BAS_IN_RAM = __FASTRAM_END; + __BAS_SIZE = 0; + __BAS_LMA = __BAS_IN_RAM; #endif - /* Other flash components */ - __FIRETOS = 0xe0400000; - __EMUTOS = EMUTOS_BASE_ADDRESS; - __EMUTOS_SIZE = 0x00100000; + /* Other flash components */ + __FIRETOS = 0xe0400000; + __EMUTOS = EMUTOS_BASE_ADDRESS; + __EMUTOS_SIZE = 0x00100000; - /* where FPGA data lives in flash */ - __FPGA_CONFIG = 0xe0700000; - __FPGA_CONFIG_SIZE = 0x100000; + /* where FPGA data lives in flash */ + __FPGA_CONFIG = 0xe0700000; + __FPGA_CONFIG_SIZE = 0x100000; - /* VIDEO RAM BASIS */ - __VRAM = 0x60000000; + /* VIDEO RAM BASIS */ + __VRAM = 0x60000000; - /* Memory mapped registers */ - __MBAR = 0xFF000000; + /* Memory mapped registers */ + __MBAR = 0xFF000000; - /* 32KB on-chip System SRAM */ - __SYS_SRAM = __MBAR + 0x10000; - __SYS_SRAM_SIZE = 0x00008000; + /* 32KB on-chip System SRAM */ + __SYS_SRAM = __MBAR + 0x10000; + __SYS_SRAM_SIZE = 0x00008000; - /* MMU memory mapped registers */ - __MMUBAR = 0xFF040000; + /* MMU memory mapped registers */ + __MMUBAR = 0xFF040000; #if !defined(MACHINE_M54455) /* MCF54455 does not have RAMBAR0 and RAMBAR1 registers */ - /* - * 4KB on-chip Core SRAM0: -> exception table - */ - __RAMBAR0 = 0xFF100000; - __RAMBAR0_SIZE = 0x00001000; + /* + * 4KB on-chip Core SRAM0: -> exception table + */ + __RAMBAR0 = 0xFF100000; + __RAMBAR0_SIZE = 0x00001000; - /* 4KB on-chip Core SRAM1 */ - __RAMBAR1 = 0xFF101000; - __RAMBAR1_SIZE = 0x00001000; - __SUP_SP = __RAMBAR1 + __RAMBAR1_SIZE - 4; + /* 4KB on-chip Core SRAM1 */ + __RAMBAR1 = 0xFF101000; + __RAMBAR1_SIZE = 0x00001000; + __SUP_SP = __RAMBAR1 + __RAMBAR1_SIZE - 4; #else - __RAMBAR0 = 0x80000000; /* RAMBAR must be between 0x80000000 on MCF54455 */ - __RAMBAR0_SIZE = 0x1000; - __SUP_SP = __RAMBAR0 + __RAMBAR0_SIZE + 0x1000 - 4; + __RAMBAR0 = 0x80000000; /* RAMBAR must be between 0x80000000 on MCF54455 */ + __RAMBAR0_SIZE = 0x1000; + __SUP_SP = __RAMBAR0 + __RAMBAR0_SIZE + 0x1000 - 4; #endif /* diff --git a/sys/BaS.c b/sys/BaS.c index 07cf61c..c7f1e86 100644 --- a/sys/BaS.c +++ b/sys/BaS.c @@ -53,6 +53,8 @@ #include "video.h" #include "driver_mem.h" +#include "version.h" + // #define DEBUG #include "debug.h" @@ -872,6 +874,34 @@ void BaS(void) uint8_t *src; uint8_t *dst = (uint8_t *) TOS; + /* + * install (preliminary) exception vectors + */ + setup_vectors(); + + xprintf("\n\n"); + xprintf("%s BASIS system (BaS) v %d.%d (%s, %s)\r\n\r\n", +#if defined(MACHINE_FIREBEE) + "Firebee" +#elif MACHINE_M5484LITE + "m5484 LITEKIT" +#elif MACHINE_M5475EVB + "m5475 EVB" +#else + "unknown platform" +#endif + , MAJOR_VERSION, MINOR_VERSION, __DATE__, __TIME__); + + /* + * Determine cause(s) of Reset + */ + if (MCF_SIU_RSR & MCF_SIU_RSR_RST) + xprintf("Reset. Cause: External Reset\r\n"); + if (MCF_SIU_RSR & MCF_SIU_RSR_RSTWD) + xprintf("Reset. Cause: Watchdog Timer Reset\n"); + if (MCF_SIU_RSR & MCF_SIU_RSR_RSTJTG) + xprintf("Reset. Cause: BDM/JTAG Reset\r\n"); + #if defined(MACHINE_FIREBEE) // initialize FireBee specific hardware components */ fpga_configured = init_fpga(); diff --git a/sys/sysinit.c b/sys/sysinit.c index db22a81..a4c4a95 100644 --- a/sys/sysinit.c +++ b/sys/sysinit.c @@ -35,7 +35,6 @@ #include "bas_types.h" #include "wait.h" #include "util.h" -#include "version.h" #if defined(MACHINE_FIREBEE) #include "firebee.h" @@ -64,10 +63,8 @@ */ static void init_slt(void) { - xprintf("slice timer initialization: "); MCF_SLT0_STCNT = 0xffffffff; MCF_SLT0_SCR = MCF_SLT_SCR_TEN | MCF_SLT_SCR_RUN; /* enable and run continuously */ - xprintf("finished\r\n"); } /* @@ -259,7 +256,6 @@ static void init_serial(void) MCF_PSC3_PSCCR = 0x05; #endif /* MACHINE_FIREBEE */ - xprintf("\r\nserial interfaces initialization: finished\r\n"); } /********************************************************************/ @@ -267,8 +263,6 @@ static void init_serial(void) /********************************************************************/ static bool init_ddram(void) { - xprintf("SDRAM controller initialization: "); - /* * Check to see if the SDRAM has already been initialized * by a run control tool @@ -376,14 +370,8 @@ static bool init_ddram(void) #endif /* MACHINE_FIREBEE */ - xprintf("finished\r\n"); - return true; } - else - { - xprintf("skipped. Already initialized (running from RAM)\r\n"); - } return false; } @@ -392,8 +380,6 @@ static bool init_ddram(void) */ static void init_fbcs() { - xprintf("FlexBus chip select registers initialization: "); - /* Flash */ MCF_FBCS0_CSAR = MCF_FBCS_CSAR_BA(BOOTFLASH_BASE_ADDRESS); /* flash base address */ MCF_FBCS0_CSCR = MCF_FBCS_CSCR_PS_16 | /* 16 bit word access */ @@ -471,8 +457,6 @@ static void init_fbcs() MCF_FBCS5_CSMR = MCF_FBCS_CSMR_BAM_256M | /* maps 0x60000000 to 0x68000000 */ MCF_FBCS_CSMR_V; #endif /* MACHINE_FIREBEE */ - - xprintf("finished\r\n"); } @@ -510,7 +494,10 @@ static void clear_bss_segment(void) extern uint8_t _BAS_BSS_END[]; uint8_t *BAS_BSS_END = &_BAS_BSS_END[0]; - bzero(BAS_BSS_START, BAS_BSS_END - BAS_BSS_START + 1); + int i; + + for (i = 0; i < BAS_BSS_END - BAS_BSS_START + 1; i++) + BAS_BSS_START[i] = 0; } void initialize_hardware(void) @@ -518,29 +505,6 @@ void initialize_hardware(void) init_gpio(); init_serial(); - xprintf("\n\n"); - xprintf("%s BASIS system (BaS) v %d.%d (%s, %s)\r\n\r\n", -#if defined(MACHINE_FIREBEE) - "Firebee" -#elif MACHINE_M5484LITE - "m5484 LITEKIT" -#elif MACHINE_M5475EVB - "m5475 EVB" -#else - "unknown platform" -#endif - , MAJOR_VERSION, MINOR_VERSION, __DATE__, __TIME__); - - /* - * Determine cause(s) of Reset - */ - if (MCF_SIU_RSR & MCF_SIU_RSR_RST) - xprintf("Reset. Cause: External Reset\r\n"); - if (MCF_SIU_RSR & MCF_SIU_RSR_RSTWD) - xprintf("Reset. Cause: Watchdog Timer Reset\n"); - if (MCF_SIU_RSR & MCF_SIU_RSR_RSTJTG) - xprintf("Reset. Cause: BDM/JTAG Reset\r\n"); - /* * Clear the Reset Status Register */ @@ -548,54 +512,6 @@ void initialize_hardware(void) | MCF_SIU_RSR_RSTWD | MCF_SIU_RSR_RSTJTG); - /* - * Determine which processor we are running on - */ - xprintf("JTAGID: "); - switch (MCF_SIU_JTAGID & MCF_SIU_JTAGID_PROCESSOR) - { - case MCF_SIU_JTAGID_MCF5485: - xprintf("MCF5485"); - break; - case MCF_SIU_JTAGID_MCF5484: - xprintf("MCF5484"); - break; - case MCF_SIU_JTAGID_MCF5483: - xprintf("MCF5483"); - break; - case MCF_SIU_JTAGID_MCF5482: - xprintf("MCF5482"); - break; - case MCF_SIU_JTAGID_MCF5481: - xprintf("MCF5481"); - break; - case MCF_SIU_JTAGID_MCF5480: - xprintf("MCF5480"); - break; - case MCF_SIU_JTAGID_MCF5475: - xprintf("MCF5475"); - break; - case MCF_SIU_JTAGID_MCF5474: - xprintf("MCF5474"); - break; - case MCF_SIU_JTAGID_MCF5473: - xprintf("MCF5473"); - break; - case MCF_SIU_JTAGID_MCF5472: - xprintf("MCF5472"); - break; - case MCF_SIU_JTAGID_MCF5471: - xprintf("MCF5471"); - break; - case MCF_SIU_JTAGID_MCF5470: - xprintf("MCF5470"); - break; - } - - /* - * Determine the processor revision - */ - xprintf(" (revision %d)\r\n", ((MCF_SIU_JTAGID & MCF_SIU_JTAGID_REV) >> 28)); /* make sure MMU is disabled */ MCF_MMU_MMUCR = 0; /* MMU off */ @@ -606,25 +522,9 @@ void initialize_hardware(void) init_ddram(); #if defined(MACHINE_M5484LITE) || defined(MACHINE_M5475EVB) - dbg("Fire Engine Control register: %02x\r\n", * (uint8_t *) 0x61000000); - dbg("Fire Engine interrupt register: %02x\r\n", * (uint8_t *) 0x62000000); - dbg("Fire Engine interrupt mask register: %02x\r\n", * (uint8_t *) 0x63000000); - dbg("Fire Engine power management register: %02x\r\n", * (uint8_t *) 0x64000000); - dbg("Fire Engine EEPROM SPI register: %02x\r\n", * (uint8_t *) 0x65000000); - dbg("Fire Engine Flash register: %02x\r\n", * (uint8_t *) 0x66000000); - dbg("Fire Engine CPLD revision register: %02x\r\n", * (uint8_t *) 0x67000000); - dbg("Fire Engine Hardware revision register:%02x\r\n", * (uint8_t *) 0x68000000); - - dbg("write control register 0x%02x\r\n", 1 << 7); * (uint8_t *) 0x61000000 = 1 << 7; - dbg("Fire Engine Control register: %02x\r\n", * (uint8_t *) 0x61000000); #endif /* MACHINE_M5484LITE */ - /* - * install (preliminary) exception vectors - */ - setup_vectors(); - /* * save the planet (and reduce case heat): disable clocks of unused SOC modules */ @@ -646,12 +546,17 @@ void initialize_hardware(void) /* the following only makes sense _after_ DDRAM has been initialized */ clear_bss_segment(); - xprintf(".bss segment cleared\r\n"); if (BAS_LMA != BAS_IN_RAM) { - xprintf("copy BaS to RAM\r\n"); - memcpy((void *) BAS_IN_RAM, BAS_LMA, BAS_SIZE); + int i; + + /* although tempting, do not use memcpy() here */ + + for (i = 0; i < BAS_SIZE; i++) + { + BAS_IN_RAM[i] = BAS_LMA[i]; + } /* we have copied a code area, so flush the caches */ flush_and_invalidate_caches();