363 lines
8.1 KiB
C
363 lines
8.1 KiB
C
/*
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* BaS
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*
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*/
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#include "MCF5475.h"
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#include "startcf.h"
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#include "MCD_dma.h"
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#define MBAR_BASE_ADRS 0xff000000
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#define MMAP_DMA 0x00008000
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#define MMAP_SRAM 0x00010000
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extern unsigned long far __SDRAM_SIZE;
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/* imported routines */
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extern int mmu_init();
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extern int mmutr_miss();
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extern int vec_init();
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extern int illegal_table_make();
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extern int cf68k_initialize();
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/********************************************************************/
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/* warte_routinen /*
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********************************************************************/
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void warte_10ms(void)
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{
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asm
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{
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warte_10ms:
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move.l d0,-(sp)
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move.l #1330000,d0
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move.l d0,MCF_SLT0_STCNT
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warte_d6:
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move.b MCF_SLT0_SSR,d0
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btst.b #0,d0
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beq warte_d6
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move.l (sp)+,d0
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}
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}
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void warte_1ms(void)
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{
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asm
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{
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warte_1ms:
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move.l d0,-(sp)
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move.l #133000,d0
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move.l d0,MCF_SLT0_STCNT
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warte_d6:
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move.b MCF_SLT0_SSR,d0
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btst.b #0,d0
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beq warte_d6
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move.l (sp)+,d0
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}
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}
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void warte_100us(void)
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{
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asm
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{
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warte_100us:
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move.l d0,-(sp)
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move.l #13300,d0
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move.l d0,MCF_SLT0_STCNT
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warte_d6:
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move.b MCF_SLT0_SSR,d0
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btst.b #0,d0
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beq warte_d6
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move.l (sp)+,d0
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}
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}
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void warte_50us(void)
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{
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asm
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{
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warte_50us:
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move.l d0,-(sp)
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move.l #6650,d0
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move.l d0,MCF_SLT0_STCNT
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warte_d6:
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move.b MCF_SLT0_SSR,d0
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btst.b #0,d0
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beq warte_d6
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move.l (sp)+,d0
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}
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}
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void warte_10us(void)
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{
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asm
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{
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warte_10us:
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move.l d0,-(sp)
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move.l #1330,d0
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move.l d0,MCF_SLT0_STCNT
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warte_d6:
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move.b MCF_SLT0_SSR,d0
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btst.b #0,d0
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beq warte_d6
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move.l (sp)+,d0
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}
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}
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void warte_1us(void)
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{
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asm
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{
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warte_1us:
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move.l d0,-(sp)
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move.l #133,d0
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move.l d0,MCF_SLT0_STCNT
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warte_d6:
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move.b MCF_SLT0_SSR,d0
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btst.b #0,d0
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beq warte_d6
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move.l (sp)+,d0
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}
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}
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/********************************************************************/
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#define ide_dma_tnr 7
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void BaS(void)
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{
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/*********************************************/
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// SD-Card abfragen
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int az_sectors;
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int sd_status,i;
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int dma_init_status,dma_run_status,dma_status;
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az_sectors = sd_card_init();
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if(az_sectors>0)
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{
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sd_card_idle();
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}
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/*********************************************/
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// FireTOS laden?
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asm
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{
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move.b DIP_SWITCH,d0
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btst.b #6,d0
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beq firetos_kopieren
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/**************************************/
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// PIC initieren und daten anfordern
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lea MCF_PSC0_PSCTB_8BIT,a6
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lea MCF_PSC3_PSCTB_8BIT,a3
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lea MCF_PSC3_PSCRB_8BIT,a4
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lea MCF_PSC3_PSCRFCNT,a5
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move.l #'ACPF',(a3) // SEND SYNC MARKE, MCF BEREIT
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bsr warte_10ms
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move.l #'PIC ',(a6)
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move.b (a4),d0
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move.b d0,(a6)
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move.b (a4),d1
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move.b d1,(a6)
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move.b (a4),d2
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move.b d2,(a6)
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move.b #0x01,(a3) // RTC DATEN ANFORDERN
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move.l #'OK!',(a6)
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move.l #0x0a0d,(a6)
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/**************************************/
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// TOS kopieren
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lea 0x00e00000,a0
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lea 0xe0600000,a1 // default tos
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lea 0xe0700000,a2 // 1MB
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move.b DIP_SWITCH,d0 // dip schalter adresse
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btst.b #6,d0
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bne cptos_loop
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firetos_kopieren:
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lea 0x00e00000,a0
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lea 0xe0400000,a1
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lea 0xe0500000,a2 // 1MB
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cptos_loop:
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move.l (a1)+,(a0)+
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move.l (a1)+,(a0)+
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move.l (a1)+,(a0)+
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move.l (a1)+,(a0)+
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move.l (a1)+,(a0)+
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move.l (a1)+,(a0)+
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move.l (a1)+,(a0)+
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move.l (a1)+,(a0)+
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cmp.l a2,a1
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blt cptos_loop
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/***************************************************************/
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/* div inits
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/***************************************************************/
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div_inits:
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move.b DIP_SWITCH,d0 // dip schalter adresse
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btst.b #6,d0
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beq video_setup
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// rtc daten laden, mmu set, etc nur wenn switch 6 = off -> kein init wenn FireTOS
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lea 0xffff8961,a0
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clr.l d1
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moveq #64,d2
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move.b (a4),d0
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cmp.b #0x81,d0
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bne not_rtc
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loop_sr:
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move.b (a4),d0
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move.b d1,(a0)
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move.b d0,2(a0)
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addq.l #1,d1
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cmp.b d1,d2
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bne loop_sr
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move.b #63,(a0)
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move.b 2(a0),d0
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add #1,d0
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move.b d0,2(a0)
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not_rtc:
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bsr mmu_init
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bsr vec_init
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bsr illegal_table_make
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// interrupts
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clr.l 0xf0010004 // disable all interrupts
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lea MCF_EPORT_EPPAR,a0
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move.w #0xaaa8,(a0) // falling edge all,
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// timer 0 on mit int -> video change -------------------------------------------
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move.l #MCF_GPT_GMS_ICT(1)|MCF_GPT_GMS_IEN|MCF_GPT_GMS_TMS(1),d0 //caputre mit int on rising edge
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move.l d0,MCF_GPT0_GMS
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moveq.l #0x3f,d0 // max prority interrutp
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move.b d0,MCF_INTC_ICR62 // setzen
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// -------------------------------------------------
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move.b #0xfe,d0
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move.b d0,0xf0010004 // enable int 1-7
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nop
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lea MCF_EPORT_EPIER,a0
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move.b #0xfe,(a0) // int 1-7 on
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nop
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lea MCF_EPORT_EPFR,a0
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move.b #0xff,(a0) // alle pending interrupts l<>schen
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nop
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lea MCF_INTC_IMRL,a0
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move.l #0xFFFFFF00,(a0) // int 1-7 on
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lea MCF_INTC_IMRH,a0
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move.l #0xBFFFFFFE,(a0) // psc3 and timer 0 int on
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move.l #MCF_MMU_MMUCR_EN,d0
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move.l d0,MCF_MMU_MMUCR // mmu on
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nop
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nop
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/********************************************************************/
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video_setup:
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// nichts
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/*******************************************************************/
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/* memory setup
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/********************************************************************/
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lea 0x400,a0
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lea 0x800,a1
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mem_clr_loop:
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clr.l (a0)+
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clr.l (a0)+
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clr.l (a0)+
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clr.l (a0)+
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cmp.l a0,a1
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bgt mem_clr_loop
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moveq #0x48,d0
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move.b d0,0xffff8007
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// stram
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move.l #0xe00000,d0 // ende stram
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move.l d0,0x42e
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move.l #0x752019f3,d0 // memvalid
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move.l d0,0x420
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move.l #0x237698aa,d0 // memval2
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move.l d0,0x43a
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move.l #0x5555aaaa,d0 // memval3
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move.l d0,0x51a
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// ttram
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move.l #__SDRAM_SIZE,d0 // ende ttram
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move.l d0,0x5a4
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move.l #0x1357bd13,d0 // ramvalid
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move.l d0,0x5a8
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// init acia
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moveq #3,d0
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move.b d0,0xfffffc00
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nop
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move.b d0,0xfffffc04
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nop
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moveq #0x96,d0
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move.b d0,0xfffffc00
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moveq #-1,d0
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nop
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move.b d0,0xfffffa0f
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nop
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move.b d0,0xfffffa11
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nop
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}
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/*
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// init_dma:
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dma_init_status =
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MCD_initDma(
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(dmaRegs*) (MBAR_BASE_ADRS + MMAP_DMA),
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(void*) (MBAR_BASE_ADRS + MMAP_SRAM),
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(MCD_RELOC_TASKS)
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);
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for (i=0; i<64; i++)
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{
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dma_run_status =
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MCD_startDma(ide_dma_tnr, //int channel, the channel on which to run the DMA
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(char*) (0x60004000), //s8 *srcAddr, the address to move data from, or physical buffer-descriptor address
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4, //s16 srcIncr, the amount to increment the source address per transfer
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(char*) (0x60000000), //s8 *destAddr, the address to move data to
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4, //s16 destIncr, the amount to increment the destination address per transfer
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4*389120, //u32 dmaSize, the number of bytes to transfer independent of the transfer size
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4, //u32 xferSize, the number bytes in of each data movement (1, 2, or 4)
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0, //u32 initiator, what device initiates the DMA
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5, //int priority, priority of the DMA
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MCD_SINGLE_DMA+
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MCD_TT_FLAGS_CW+ //u32 flags, flags describing the DMA
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MCD_TT_FLAGS_RL+
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MCD_TT_FLAGS_SP,
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MCD_NO_BYTE_SWAP+
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MCD_NO_BIT_REV //u32 funcDesc a description of byte swapping, bit swapping, and CRC actions
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);
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while (MCD_dmaStatus(ide_dma_tnr)!=6);
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}
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dma_status =
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MCD_dmaStatus(ide_dma_tnr);
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MCD_killDma(ide_dma_tnr);
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*/
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asm
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{
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// test auf protect mode ---------------------
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move.b DIP_SWITCH,d0
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btst #7,d0
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beq no_protect // nein->
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move.w #0x0700,sr
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no_protect:
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}
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MCF_PSC0_PSCTB_8BIT = 0x0a0d;
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MCF_PSC0_PSCTB_8BIT = 'BaS ';
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MCF_PSC0_PSCTB_8BIT = 'comp';
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MCF_PSC0_PSCTB_8BIT = 'lete';
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MCF_PSC0_PSCTB_8BIT = 'd';
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MCF_PSC0_PSCTB_8BIT = 0x0a0d;
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MCF_PSC0_PSCTB_8BIT = '----';
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MCF_PSC0_PSCTB_8BIT = '----';
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MCF_PSC0_PSCTB_8BIT = '----';
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MCF_PSC0_PSCTB_8BIT = '-';
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MCF_PSC0_PSCTB_8BIT = 0x0a0d;
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MCF_PSC0_PSCTB_8BIT = 0x0a0d;
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asm
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{
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nop
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bsr warte_10ms
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jmp 0xe00030
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}
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}
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